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gpegsol-0.3
- Javascr ipt 计数器的游戏。要运行这个游戏，点击左边的按钮，计数器将开始。再点击一次这个按钮，将停止计数器。 -Javascr ipt counter game. To run the game, click the left button, counters will begin. Another click a button to stop counter.
SxShop31
- 数据库设计2．页面的设计与开发3．小结第8章在线考试系统 161 实例分析 161 1． 系统设计2．系统功能预览知识要点 167 制作步骤 168 1 ... 利用简单的HTML代码与脚本 融合而成的ASP技术可以开发强大的Web应用程序，例如数据库的存取、文件的访问、计数器的 -2 database design. Page Design and Development 3. Summary Chapter 8 Online Exa
0307cfcount
- 功 能： 1.40种记数器图片样式可以选择，并且可以方便自由地增加记数器图片样式! 2.可以设置计数器显示数字,计数器起始时间,计数器隐藏,是否防刷新记数。 3.可以记录来访客的来源IP地址和来源页面信息。 4.每天的访问数据统计。 6.密码找回功能。 7.为多用户计数器，具有注册用户管理功能,可以设置记数器运行环境。 8.可以设置记录的最大条数，超过会自动删除，保证系统快速稳定运行。 9.增加计数器图
ver2.0
- 采用CYGNAL F015单片机，用于一个电池老化试验柜（即循环充放电）的实用程序，实现了SMBUS总线通信协议。-used CYGNAL macroeconomic microcontroller, for a battery aging test counters (that is, charge-discharge cycle), the practical procedures to achieve the SMBUS bus
8253 8259 time
- 计时程序,对8253进行分频,使用二个计数器,使第二个计数器的OUT作为中断源,送到8259产生中断,在LED上显示时间-time procedures for the 8,253-frequency, the use of two counters, so that a second counter OUT interrupted as a source to have interrupted 8259, the time shown
counter10
- 该程序实现的是10进制的计数器，具有置位复位的功能。-the program is the band of 10 counters, with the home-reset function.
Counters
- Multiple counters, demo how to dynamic create multiple counters, and count by itself. -Multiple counters, demo how to create dynamic multiple counters, and count by itself.
vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers Sta
Counters
- Multiple counters, demo how to dynamic create multiple counters, and count by itself. -Multiple counters, demo how to create dynamic multiple counters, and count by itself.
Verilog_example
- 本文件包括多路选择器器建模，译码器实验程序，加法器实验程序，比较器实验程序，计数器建模，I2C接口标准建模源码，串行接口RS232标准建模源码标准，LCM建模源码，时钟６分频源码，串并转化源码。 ，对于硬件设计初学者来说有一定的参考价值。-This document includes MUX device modeling, experimental procedure decoder, adder experimental pro
count
- Asp网站访问量计数器,简单实用，有不同的数字图片可选择！-Asp site traffic counters, simple and practical, there are different digital picture to choose!
counters
- 两数相加，主要是对输入的判断那花了点篇幅 不过是绝对正确的 我都运行了 -counters
vhdlcoder
- 本文件夹包含了16个VHDL 编程实例，仅供读者编程时学习参考。 一、四位可预置75MHz -BCD码（加/减）计数显示器（ADD-SUB）。 二、指示灯循环显示器（LED-CIRCLE) 三、七人表决器vote7 四、格雷码变换器graytobin 五、1位BCD码加法器bcdadder 六、四位全加器adder4 七、英语字母显示电路 alpher 八、74LS160计数器74ls160
SPI-interface-counters
- SPI接口的计数器。对于初学者是非常好的学习资料-SPI interface counters. For beginners is very good learning materials
Usage-of-performance-counters-in-miniMIPS-for-Fun
- The quality of functional testing of supercomputer application often requires analyzing the interaction of the appli- cation and the underlying architecture. In this report, we incorpo- rate some performance counte
Building-Counters-Veriog-Example
- building counters in vhdl
RESET-COUNTERS
- use as practice to work ona micrologix 1000, to reset counters
counters
- DIFFERNT TYPES OF COUNTERS
counters
- 两数相加，主要是对输入的判断那花了点篇幅 不过是绝对正确的 我都运行了 -counters
basic verilog codes
- Basic Verilog code includes RING and Johnson counters, Up-down counters, RAM, ROM, SIPO, PISO, SISO, PIPO, Mealy and Moore FSM codes