搜索资源列表
DM814x_DDR_Controller_Register_v1.0
- TI DM8148 DDR3 的参数配置表单，可以通过这个工具，调整DDR3的参数，得出相应寄存器配置-TI DM8148 DDR3 parameter configuration form, can use this tool to adjust the parameters of DDR3, draw the corresponding configuration register
ug586_7Series_MIS-xi
- 有关于xilinx平台DDR3 ip core介绍-xilinx ip core
xilinx_DDR3-ctl_code
- VHDL语言，xilinx,ddr3 控制代码，已实现-VHDL xilinx DDR3ctl code
1
- 。针对高速实 时数字信号处理中大容量采样数据 通过DDR3 存储和读取的应用背景，-java linux
K7DDR3
- 关于K7板子上ddr3的调试程序，用verilog语言写的-About debugger on K7 board ddr3, with the verilog language written
RK306-SDK-DDR3
- SDK for Rockchip RK30-SDK for Rockchip RK3066
ti_dm81xx_evm
- 风河官方提供ti8168 vxworks bsp包，支持sd/MMC FLASH DDR3 SPI USB SATA等设备-Wind River official ti8168 vxworks bsp package, support sd/MMC FLASH DDR3 SPI USB SATA and other equipment
ti_omap3
- 风河官方提供的omap3530 vxworks bsp包，支持sd/MMC FLASH DDR3 SPI USB SATA等设备-Wind River s official omap3530 vxworks bsp package, support sd/MMC FLASH DDR3 SPI USB SATA and other equipment
ti_keystone2
- 风河官方提供的keystone vxworks bsp包，支持sd/MMC FLASH DDR3 SPI USB SATA等设备-Wind River Pack keystone vxworks bsp official support sd/MMC FLASH DDR3 SPI USB SATA and other equipment
ti_dm6446evb
- 风河官方提供的dm6446 vxworks bsp包，支持sd/MMC FLASH DDR3 SPI USB SATA等设备-Wind River s official dm6446 vxworks bsp package, support sd/MMC FLASH DDR3 SPI USB SATA and other equipment
arbiter
- 仲裁器代码,DDR3 SDRAM控制用所给出，请大家参考，-arbiter for ddr3 sdram
ddr3_model
- 一个verilog语言开发编写的简单的ddr3模型-A simple model ddr3, written with verilog language
sddr3
- the below are mentioned in some, but not all, ddr3 docs.
Zynq-Mini-ITX-Rev-E
- Zynq Mini-ITX 单芯片可编程SOC(ARM+FPGA)开发板电路原理图 -Zynq Mini-ITX Development Board Schematics the Zynq Mini-ITX development board features 2 GB DDR3 SDRAM, PCIe Gen2 x16 Root Complex slot (x4 electrical), SATA-III interface
lib_dmarc_1d_v1
- xilinx DDR3控制器读数据控制,对读控制器进行了很好的读写封装，可以支持连续和非连续读写。-xilinx DDR3 controller reads the data controller, the read controller package to read and write well, you can support continuous and sequential read and write.
ddr3_demo_verilog
- 基于Verilog HDL的ddr3控制器，适用于lattice的ECP3系列-ddr3 controller based on Verilog HDL，used in lattice ECP3 serial FPGA
ddr_top
- verilog语言ddr3读写程序，axi总线协议，用于ddr3读写测试-ddr3 read and write
R8M_DataSheet_V02
- This document describes the application information of R8M Module that includes Allwinner Tech’s high performance processer R8 and 64Gb NAND Flash/4Gb DDR3 memory MCP. R8M is highly integrated, low power consumption, low
A13-Brief
- This document describes the application information of R8M Module that includes Allwinner Tech’s high performance processer R8 and 64Gb NAND Flash/4Gb DDR3 memory MCP. R8M is highly integrated, low power consumption, low
Altera-Cyclone-V-Memory
- Altera Cyclone V FPGA中的高效能硬核Memory控制器-Altera Cyclone V FPGA ddr3 Memory control