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i2c_slave_model_verilog
- 一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用.-general website have i2c master module of code, but very few slave code, This is the slave code, very useful.
i2s_master_slave_vhdl
- i2s串行线广泛用于音频通信中,这里包括了master和slave的代码.-i2s serial lines widely used in audio communication, here including the master and slave codes.
svc_spi
- AT91SAM7S64 SPI Slave mode with PDC sample code from Konrad.Wei
SlaveI2C
- 用于Slave I2C得读写,此代码针对特定得芯片,但对其他得芯片也有借鉴作用.-for literacy in this specific code in the chip. But on the other in the chip also be useful.
I2CSLAVE2
- Easyarm实验开发平台，测试i2c在slave模式下的时序-Easyarm experimental platform to test i2c slave mode in the chronology
fet140_i2c_17
- MSP-FET430P140 Demo - I2C, Slave Reads/Writes with Master, Rptd Start-MSP-FET430P140 Demo-I2C, Slave Reads/Writes with Master, Rptd Start
LINSlaveExample
- LIN Slave Example 芯片是PIC18系列 程序我已经调试过了，可以实际应用。-LIN Slave Example chip PIC18 series debugging procedures I have before. be practical application.
st7_i2cslave
- st7单片机关于slave方式I2C总线设计的源程序,使用ST7单片机的很有用-st7 microcontroller on the slave mode I2C bus design of the source, use ST7 MCU useful
ModbusSimulator
- MODBUS的从站仿真软件，不错的东西哦-MODBUS slave of simulation software, a good thing Oh
ahb_system_generator.tar
- An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph wher
PC_Based_Controller_Modbus
- 一般使用PC Based Controller 都是当作现场设备的一种，也就是要接受 主系统的命令，做一些操作控制。以Modbus 来看属于Slave 的角色，随 时等待接收Modbus Master 的Query Message，然后依据内容做控制，最后 将控制结果以Response Message 回传。本章将以ICP 7524 及ICP 7188E5 等 两种设备分别设计Modbus RTU、ASCII 及Modb
bulksrc
- 毕业课题部分程序： CY7C68013 Bulk IN 68013工作在AUTO IN模式，16位总线 SLAVE FIFO.MASTER是 ADI BF533。-Graduated from some of the procedures subject: CY7C68013 Bulk IN 68013 work in the AUTO IN mode, 16-bit bus SLAVE FIFO.MASTER is ADI BF5
SL811HSTslave
- SL811HST与51单片机组成usb从机的程序-SL811HST with 51 single-chip component the procedure usb slave
iicreciver
- iic slave verilog hdl code
USB2.0_Slave_FIFO_Sync
- This a CY7C68013 (USB2.0 Chip) Configuration example for Slave FIFO Mode with Sync Signal.
USB2.0_Slave_FIFO_ASync
- This an USB2.0 chip CY7C68013 Configuraion Example for Slave FIFO mode with "async" mode.
SPI_M_mode
- TI MSP430 SPI通信的主从模式-TI MSP430 SPI communications Master-Slave mode
SPI_Code(Verilog)
- SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用-SPI bus under the Verilog hardware descr iption language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate modu
SPI_rtest
- 针对Silicon labs的C8051F020 mcu 的全双工SPI(4线)调试从器件部分程序,对其接收到的主器件的数据包会从串口1中发送至PC,从串口助手中可以看到.开发环境为KeilC,需要U-EC3仿真器下载至mcu中,方可调试. 这与上传的另一个SPI_test是两个相关的程序,但是二者的配置有很大的区别.如果要实现全双工,需要在从器件里保证:在主器件发起通信前将待发数据赋给SPIDATA缓冲器(注意收发缓冲器是同一个).当
modbus_master_slave_plc
- MODBUS MASTER AND SLAVE ABOUT S7-200 PLC