搜索资源列表
sc2v
- SystemC to Verilog 转换源程序。-SystemC conversion to Verilog source.
rsa-systemc
- 适用于systemC环境的rsa算法程序的源代码-applicable to the environment rsa algorithm source code
systemc
- 实现进程间通信,消息的创建、发送和接收,共享存储区的创建、附接和断接,实现储存管理-achieve inter-process communication, information creation, sending and receiving, storage sharing in the creation, and attached disconnect achieve storage management
systemcTOVerlogHDL
- 一个带波形输出的扫频模板systemC源程序， 该程序在SystemCStudio开发平台下生成， 实现systemC仿真、波形显示以及自动生成Verilog HDL代码。-waveform output with a sweep of the template systemC source, SystemCStudio the program development platform in the next generatio
usb11_systemc
- USB 1.1 PHY的代码，systemc语言 USB 1.1 PHY的代码，systemc语言,包括基于systemc语言的testbench ，和相关的doc文档-USB 1.1 PHY code systemc language USB 1.1 PHY code, systemc languages, including systemc based testbench language, doc and related docu
systemc
- SystemC语言编写的随机数产生器,SystemC是C++语言的一个超集-SystemC language random number generator, SystemC is C++ A superset of the language
systemc-2.2.0
- SystemC类库文件，最新版2.2.除了类库文件外，还有一些实例程序和相关文档。-SystemC class library file, the latest version 2.2. In addition to library documents, there are some examples of procedures and related documentation.
systemc-2.2.0
- system C源码 一种替代verilog的语言
at_example
- 这是一个systemc语言的几个实例。都能正常运行。-This is a few examples SystemC language. Able to operate normally.
vh2sc
- 将VHDL转换为C的软件 将VHDL转换为C的软件-VH2SC is a free basic VHDL to SystemC converter. The converter handles a small subset of Synthesisable VHDL 87/93 language constructs. The current version translates all VHDL IEEE types to sc_
fulladder
- 一个全加器的systemc代码，包括模块的定义以及测试平台-A source code about full adder using systemc language , including the definition of modules as well as the test platform
fir
- This an examples of fir filter implemented in SystemC.-This is an examples of fir filter implemented in SystemC.
pipe
- This an example of pipeline implemented in SystemC-This is an example of pipeline implemented in SystemC
pkt_switch
- This is an example of packet switch implemented in SystemC.
risc_cpu
- This an example of simple RISC CPU implemented in SystemC.-This is an example of simple RISC CPU implemented in SystemC.
systemc
- Systemc实现一个加法器，一个乘法器，一个十选一器，并在testbench内检测其正确性。 适用于systemc入门。-Using Systemc for the realization of a adder, a multiplier, a decimator, and within a testbench for their functionalities . Designed for Systemc or C++ beg
systemc-2.2.0
- 这个是systemC在VC下编译后的文件，响应的运行时 include systemc-2.2.0\src systemc.h 都文件。并且建立项目时 把SystemC.lib加入项目中即可编译SystemC-This is the systemC after VC complie, you can include the systemc-2.2.0\src systemc.h file and add SystemC.lib to
systemc-2.2.0
- 一个嵌入式方面相关，就是systemc，基于c++语言，-Related to an embedded aspect is systemc, based on c++ language,
systemc-2.0.1
- SystemC的源码，可以采用该文件实现system c仿真-SystemC source code, the file can be used to achieve system c simulation
systemc-2.2.0.tar
- SystemC Class Library (Rel. 2.2.0) TLM模擬硬體功能。 - SystemC Class Library (Rel. 2.2.0) ================================== This is the release of the SystemC 2.2.0 Class Library. -------