资源列表
[软件工程] Intro_to_VHDL
说明：Notes on VHDL (VHSIC Hardware Definition Language) A popular language for designing digital chips including FPGAs and CPLDs Notes on PERL, a popular scr ipting language-Notes on VHDL (VHSIC Hardware Definition Language) A popular language f<johnp> 在 2025-06-28 上传 | 大小：161kb | 下载：0
[软件工程] VHDL_Notes
说明：Notes ofn the VHDL. The VHDL (VHSIC Hardware Descr iptive language) is used for the design of ASIC, FPGA and CPLD integrated circuits-Notes ofn the VHDL. The VHDL (VHSIC Hardware Descr iptive language) is used for the design of ASIC, FPGA and CPLD i<johnp> 在 2025-06-28 上传 | 大小：793kb | 下载：0
[软件工程] verilog
说明：A popular cookbook describing the Verilog language for the design of integrated circuits. Verilog is the alternative to VHDL and is the favoured HDL design language in the USA. It is easier (quicker) to learn than VHDL because it is not so tightly ty<johnp> 在 2025-06-28 上传 | 大小：471kb | 下载：0
[软件工程] FSM-design
说明：An overview of Finite State Machines. FSMs are an important aspect of FPGA and CPLD desig using VHDL and Verilog-An overview of Finite State Machines. FSMs are an important aspect of FPGA and CPLD desig using VHDL and Verilog<johnp> 在 2025-06-28 上传 | 大小：61kb | 下载：0
[软件工程] Java_Generics_And_Collections_2006
说明：In the past decade, Java has become the language of choice for a variety of applications. But Java developers have found themselves repeatedly referring to references such as Sedgewick s Algorithms in C for solutions to common programming problems. T<saurabh> 在 2025-06-28 上传 | 大小：904kb | 下载：0
[软件工程] JavaScript
说明：此方法控制TextBox只收数字：0~9 , 也自可以定义其它可输入字符,如改成: 65~123,只允许输入: a~z和A~Z 等.-This method controls TextBox only accept numbers: 0 to 9, but also from other available input character can be defined, such as changed: 65 ~ 123, only allows the input: a ~ z and A ~<赖海燕> 在 2025-06-28 上传 | 大小：5kb | 下载：0
[软件工程] SM32X-Release-Note
说明：Silicon Motion SM32X Test Program and ISP Release Note<Владимир> 在 2025-06-28 上传 | 大小：544kb | 下载：0