[软件工程] simulinkDsp28335

说明：用matlab/simulink对DSP（28335）编程，避免繁琐的程序编写并降低了出错概率-Use matlab/simulink for DSP (28335) programming, to avoid cumbersome procedures for the preparation and reduce the probability of errors
<Rudolf> 在 2025-09-18 上传 | 大小：774kb | 下载：2

[软件工程] BP

说明：某炼厂常压塔实测数据和人工化验结果（汽油干点）。假设输入变量为常顶温度、顶回流温度、进料温度、进料压力、常顶压力共5个变量；输出量为汽油干点。试用BPNN建立此常压塔汽油干点软测量模型。-A certain refinery atmospheric column measured data and artificial test results (gasoline do). Assume that the input variables for the top temperature, refl
<Amy> 在 2025-09-18 上传 | 大小：22kb | 下载：1

[软件工程] Manley-P-STM32-board-schematics

说明：万利+STM32开发板原理图,万利+STM32开发板原理图-Manley+ STM32 board schematics,Manley+ STM32 board schematics
<zhijun> 在 2025-09-18 上传 | 大小：82kb | 下载：0

[软件工程] Wildfire-stm32-board-schematics

说明：野火stm32开发板原理图,野火stm32开发板原理图-Wildfire stm32 board schematics,Wildfire stm32 board schematics
<zhijun> 在 2025-09-18 上传 | 大小：100kb | 下载：0

[软件工程] SSD1963-driver-Program

说明：SSD1963驱动程序，SSD1963驱动程序-SSD1963 driver Program，SSD1963 driver Program
<zhijun> 在 2025-09-18 上传 | 大小：148kb | 下载：0

[软件工程] pca

说明：PCA program with java neatbeans
<filkom> 在 2025-09-18 上传 | 大小：29kb | 下载：0

[软件工程] crud

说明：cread update delete with PHP and Bootstrap-cread read update delete with PHP and Bootstrap
<filkom> 在 2025-09-18 上传 | 大小：3.08mb | 下载：0

[软件工程] verilog-a-lrm-1-0

说明：The information contained in this draft manual represents the definition of the Verilog-A hardware descr iption language as proposed by OVI (Analog TSC) as of January, 1996. Open Verilog International makes no warranties whatsoever with respect t
<bkaraca> 在 2025-09-18 上传 | 大小：211kb | 下载：0

[软件工程] verilog-ieee

说明：The Verilog ¤ Hardware Descr iption Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it
<bkaraca> 在 2025-09-18 上传 | 大小：2.08mb | 下载：0

[软件工程] SystemVerilog_3.1a

说明：Accellera Standards documents are developed within Accellera and the Technical Committees of Accellera Organization, Inc. Accellera develops its standards through a consensus development process, approved by its members and board of directors, wh
<bkaraca> 在 2025-09-18 上传 | 大小：2.82mb | 下载：0

[软件工程] VerilogLangRefManual

说明：The information contained in this draft manual represents the definition of the Verilog hardware descr iption language as it existed at the time Cadence Design Systems, Inc. transferred the language and its documentation to Open Verilog International
<bkaraca> 在 2025-09-18 上传 | 大小：1.18mb | 下载：0

[软件工程] kursa4

说明：program with matrics
<irina2323> 在 2025-09-18 上传 | 大小：641kb | 下载：0