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[其它资源] Music_altera
说明:采用Verilog HDL设计,在Altera EP1S10S780C6开发板上实现 选取6MHz为基准频率,演奏的是梁祝乐曲 - Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music<huhu> 在 2008-10-13 上传 | 大小:637.12kb | 下载:0
[其它资源] MyJTAGForAvr
说明:eeprom和flash是自制JTAG的源程序,熔丝配置位图为写MG16时的熔丝配置情况。 -EEPROM and flash is a self-made JTAG source, Fuse-allocation map was made MG16 the Fuse configurations.<王宇> 在 2008-10-13 上传 | 大小:637.08kb | 下载:0