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文件名称:Domain Specific Hardware Accelerators: Vector Processing Units

  • 所属分类：
  • 教育/学校应用
  • 资源属性：
  • [PDF]
  • 上传时间：
  • 2021-10-25
  • 文件大小：
  • 3.15mb
  • 下载次数：
  • 0次
  • 提 供 者：
  • nalevihtkas
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修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

This repository contains the source code for VLSI CAD Project, Domain Specific Hardware Accelerators, as apart of coursework in

CS6230 : CAD for VLSI.

Fall, 2020.

What does this repo enclose?
Overview

The following components are implemented in Bluespec System Verilog:

CPU
RAM
Bus
Vector Processor
CPU
A minimal 2 stage pipelined inorder processor.

Vector Processor
A vector processor capable of:

Vector Negation (int8, int16, int32, float32)
Vector Minima (int8, int16, int32, float32)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main.zip 列表
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/.gitignore
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/Final Report.pdf
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/LICENSE
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/README.md
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Bus.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-BusMaster.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-BusSlave.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-BusWires.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-CPU(1).png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-CPU.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Dir.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-InstructionSet.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Overview.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Ram.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Registers.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/Overview-Simulation.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-CSRUniary(1).png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-CSRUniary.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-minima.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-temp-func(1).png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-temp-func.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-temp_structure(1).png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions-temp_structure(2).png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/VectorExtensions.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Images/overview.png
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Inter.otf
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/LICENSE
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/MetropolisBold.otf
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/README.md
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Vector/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Vector/vector_1.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Vector/vector_2.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Vector/vector_3.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/Vector/vector_4.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/back/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/back/authors.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/back/licence-agreement-template.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/demo/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/demo/demo_1.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/demo/demo_2.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/demo/demo_3.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/docs/
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/docs/docs_0.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/docs/docs_1.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/docs/docs_2.tex
Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project-main/docs/Final Report Source/docs/docs_3.tex
Domain-Specific-Hardw

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