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dds_quicklogic
- 直接频率合成，Quicklogic提供,部分源文件是Quicklogic 专用文件-direct frequency synthesis, pioneered provide some source document is dedicated ESP
PCI总线仲裁参考设计，Quicklogic提供
- PCI总线仲裁参考设计，Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
dds_quicklogic
- 这是quicklogic公司的直接频率合成（DDS）Verilog代码
dds_an_quicklogic
- 该文档是QUICKLOGIC的一篇关于用FPGA实现DDS的设计指导。
quicknote90_eclipseII_counters
- VHDL examples for counter design, use QuickLogic eclips
dds_quicklogic
- 直接频率合成，Quicklogic提供,部分源文件是Quicklogic 专用文件-direct frequency synthesis, pioneered provide some source document is dedicated ESP
PCI总线仲裁参考设计，Quicklogic提供
- PCI总线仲裁参考设计，Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
dds_quicklogic
- 这是quicklogic公司的直接频率合成（DDS）Verilog代码-QuickLogic Corporation This is a direct frequency synthesizer (DDS) Verilog code
dds_an_quicklogic
- 该文档是QUICKLOGIC的一篇关于用FPGA实现DDS的设计指导。-The document is an article on using the QuickLogic FPGA design guidance to achieve DDS.
quicknote90_eclipseII_counters
- VHDL examples for counter design, use QuickLogic eclips
QuickLogic
- Generic driver for QuickLogic devices. The only functions IRP_MJ_CREATE, IRP_MJ_CLEANUP and IRP_MJ_CLOSE are supported.