查看会员资料
- Email：用户隐藏
- Icq/MSN：qq
- 电话号码：
- Homepage：
- 会员简介：这家伙很懒,什么都没留下!
最新会员发布资源
CLOCK_co-design_of_C_and_Verilog
- A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.