文件名称:my_and

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
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  • 881kb
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  • 0次
  • 提 供 者:
  • 李*
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此实验例程适用于Actel Flash架构的ProASIC3/E系列FPGA,适合于FPGA及Verilog HDL的初学者,配套EasyFPGA030开发套件。-Routine application of this experiment in the Actel Flash architecture ProASIC3/E series FPGA, fit in the FPGA and Verilog HDL for beginners and supporting development kit EasyFPGA030.
相关搜索: ProAsic3
A3P250
Verilog
Flash

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下载文件列表

与门实验例程及文档

..................\my_and

..................\......\component

..................\......\.........\work

..................\......\.........\....\my_and

..................\......\.........\....\......\my_and.cxf

..................\......\.........\....\......\my_and.sdb

..................\......\.........\....\......\my_and.v

..................\......\.........\....\......\testbench.v

..................\......\constraint

..................\......\coreconsole

..................\......\designer

..................\......\........\impl1

..................\......\........\.....\designer.log

..................\......\........\.....\my_and.adb

..................\......\........\.....\my_and.dtf

..................\......\........\.....\..........\verify.log

..................\......\........\.....\my_and.ide_des

..................\......\........\.....\my_and.pdb

..................\......\........\.....\my_and.pdb.depends

..................\......\........\.....\my_and.tcl

..................\......\........\.....\my_and_fp

..................\......\........\.....\.........\$$FlashPro_FPBBALTLPT1.L$$

..................\......\........\.....\.........\my_and.log

..................\......\........\.....\.........\my_and.pro

..................\......\........\.....\.........\projectData

..................\......\........\.....\.........\...........\my_and.pdb

..................\......\........\.....\simulation

..................\......\hdl

..................\......\my_and.prj

..................\......\phy_synthesis

..................\......\simulation

..................\......\..........\modelsim.ini

..................\......\..........\modelsim.ini.sav

..................\......\..........\modelsim.log

..................\......\..........\run.do

..................\......\smartgen

..................\......\........\my_and_work.ixf

..................\......\........\smartgen.aws

..................\......\stimulus

..................\......\synthesis

..................\......\.........\backup

..................\......\.........\......\my_and.srr

..................\......\.........\coreip

..................\......\.........\my_and.areasrr

..................\......\.........\my_and.edn

..................\......\.........\my_and.fse

..................\......\.........\my_and.htm

..................\......\.........\my_and.map

..................\......\.........\my_and.pdc

..................\......\.........\my_and.sap

..................\......\.........\my_and.sdf

..................\......\.........\my_and.so

..................\......\.........\my_and.srd

..................\......\.........\my_and.srm

..................\......\.........\my_and.srr

..................\......\.........\my_and.srs

..................\......\.........\my_and.szr

..................\......\.........\my_and.tlg

..................\......\.........\my_and_sdc.sdc

..................\......\.........\my_and_syn.prj

..................\......\.........\run_options.txt

..................\......\.........\stdout.log

..................\......\.........\syntmp

..................\......\.........\......\my_and.plg

..................\......\.........\......\my_and_flink.htm

..................\......\.........\......\my_and_srr.htm

..................\......\.........\......\my_and_toc.htm

..................\......\.........\......\sap.log

..................\......\viewdraw

..................\......\........\sch

..................\......\........\sym

..................\......\........\vf

..................\......\........\..\project.lst

..................\......\........\viewdraw.ini

..................\......\........\wir

..................\与门.pdf

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