文件名称:I2C_ise9migration
介绍说明－－下载内容均来自于网络，请自行研究使用
IIC 的Verilog实现，工程是在Xilinx的ISE9.1上实现的-IIC of the Verilog implementation project was implemented on Xilinx' s ISE9.1
(系统自动生成,下载前可以参看下载内容)
下载文件列表
zl\I2C
..\...\coregen.prj
..\...\I2C.dhp
..\...\I2C.npl
..\...\i2c_master_bit_ctrl.cmd_log
..\...\i2c_master_bit_ctrl.lso
..\...\i2c_master_bit_ctrl.ngc
..\...\i2c_master_bit_ctrl.ngr
..\...\i2c_master_bit_ctrl.prj
..\...\i2c_master_bit_ctrl.stx
..\...\i2c_master_bit_ctrl.syr
..\...\i2c_master_bit_ctrl.v
..\...\i2c_master_bit_ctrl_vhdl.prj
..\...\i2c_master_byte_ctrl.cmd_log
..\...\i2c_master_byte_ctrl.lso
..\...\i2c_master_byte_ctrl.ngc
..\...\i2c_master_byte_ctrl.ngr
..\...\i2c_master_byte_ctrl.prj
..\...\i2c_master_byte_ctrl.stx
..\...\i2c_master_byte_ctrl.syr
..\...\i2c_master_byte_ctrl.v
..\...\i2c_master_byte_ctrl_vhdl.prj
..\...\i2c_master_defines.v
..\...\i2c_master_top.cmd_log
..\...\i2c_master_top.lso
..\...\i2c_master_top.ngc
..\...\i2c_master_top.ngr
..\...\i2c_master_top.prj
..\...\i2c_master_top.stx
..\...\i2c_master_top.syr
..\...\i2c_master_top.v
..\...\i2c_master_top_vhdl.prj
..\...\i2c_slave_model.fdo
..\...\i2c_slave_model.ndo
..\...\i2c_slave_model.udo
..\...\i2c_slave_model.v
..\...\prjname.lso
..\...\timescale.v
..\...\transcript
..\...\tst_bench_top.v
..\...\wb_master_model.v
..\...\work
..\...\....\glbl
..\...\....\....\verilog.asm
..\...\....\....\_primary.dat
..\...\....\....\_primary.vhd
..\...\....\i2c_slave_model
..\...\....\...............\verilog.asm
..\...\....\...............\_primary.dat
..\...\....\...............\_primary.vhd
..\...\....\_info
..\...\xst
..\...\...\work
..\...\...\....\hdllib.ref
..\...\...\....\vlg07
..\...\...\....\.....\i2c_master_bit_ctrl.bin
..\...\...\....\vlg5C
..\...\...\....\.....\i2c_master_byte_ctrl.bin
..\...\...\....\vlg67
..\...\...\....\.....\i2c_master_top.bin
..\...\__projnav
..\...\.........\coregen.rsp
..\...\.........\I2C.gfl
..\...\.........\I2C_flowplus.gfl
..\...\.........\i2c_master_bit_ctrl.xst
..\...\.........\i2c_master_byte_ctrl.xst
..\...\.........\i2c_master_top.xst
..\...\.........\runXst_tcl.rsp
..\...\.........\xst_sprjTOstx_tcl.rsp
..\...\coregen.prj
..\...\I2C.dhp
..\...\I2C.npl
..\...\i2c_master_bit_ctrl.cmd_log
..\...\i2c_master_bit_ctrl.lso
..\...\i2c_master_bit_ctrl.ngc
..\...\i2c_master_bit_ctrl.ngr
..\...\i2c_master_bit_ctrl.prj
..\...\i2c_master_bit_ctrl.stx
..\...\i2c_master_bit_ctrl.syr
..\...\i2c_master_bit_ctrl.v
..\...\i2c_master_bit_ctrl_vhdl.prj
..\...\i2c_master_byte_ctrl.cmd_log
..\...\i2c_master_byte_ctrl.lso
..\...\i2c_master_byte_ctrl.ngc
..\...\i2c_master_byte_ctrl.ngr
..\...\i2c_master_byte_ctrl.prj
..\...\i2c_master_byte_ctrl.stx
..\...\i2c_master_byte_ctrl.syr
..\...\i2c_master_byte_ctrl.v
..\...\i2c_master_byte_ctrl_vhdl.prj
..\...\i2c_master_defines.v
..\...\i2c_master_top.cmd_log
..\...\i2c_master_top.lso
..\...\i2c_master_top.ngc
..\...\i2c_master_top.ngr
..\...\i2c_master_top.prj
..\...\i2c_master_top.stx
..\...\i2c_master_top.syr
..\...\i2c_master_top.v
..\...\i2c_master_top_vhdl.prj
..\...\i2c_slave_model.fdo
..\...\i2c_slave_model.ndo
..\...\i2c_slave_model.udo
..\...\i2c_slave_model.v
..\...\prjname.lso
..\...\timescale.v
..\...\transcript
..\...\tst_bench_top.v
..\...\wb_master_model.v
..\...\work
..\...\....\glbl
..\...\....\....\verilog.asm
..\...\....\....\_primary.dat
..\...\....\....\_primary.vhd
..\...\....\i2c_slave_model
..\...\....\...............\verilog.asm
..\...\....\...............\_primary.dat
..\...\....\...............\_primary.vhd
..\...\....\_info
..\...\xst
..\...\...\work
..\...\...\....\hdllib.ref
..\...\...\....\vlg07
..\...\...\....\.....\i2c_master_bit_ctrl.bin
..\...\...\....\vlg5C
..\...\...\....\.....\i2c_master_byte_ctrl.bin
..\...\...\....\vlg67
..\...\...\....\.....\i2c_master_top.bin
..\...\__projnav
..\...\.........\coregen.rsp
..\...\.........\I2C.gfl
..\...\.........\I2C_flowplus.gfl
..\...\.........\i2c_master_bit_ctrl.xst
..\...\.........\i2c_master_byte_ctrl.xst
..\...\.........\i2c_master_top.xst
..\...\.........\runXst_tcl.rsp
..\...\.........\xst_sprjTOstx_tcl.rsp