文件名称:verilog_tutorial
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Chapter 1 Introduction
Chapter 2 History of Verilog
Chapter 3 Design and Tool Flow
Chapter 4 My First Program in Verilog
Chapter 5 Verilog HDL Syntax and Semantics
Chapter 6 Gate Level Modeling
Chapter 7 User Defined Primitives
Chapter 8 Verilog Operators
Chapter 9 Verilog Behavioral Modeling
Chapter 10 Procedural Timing Control
Chapter 11 Task and Functions
Chapter 12 System Task and Function
Chapter 2 History of Verilog
Chapter 3 Design and Tool Flow
Chapter 4 My First Program in Verilog
Chapter 5 Verilog HDL Syntax and Semantics
Chapter 6 Gate Level Modeling
Chapter 7 User Defined Primitives
Chapter 8 Verilog Operators
Chapter 9 Verilog Behavioral Modeling
Chapter 10 Procedural Timing Control
Chapter 11 Task and Functions
Chapter 12 System Task and Function
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verilog_tutorial.pdf