文件名称:xx_new4

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  • [ASM] [源码]
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  • 2008-10-13
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  • 376.28kb
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  • xingy*****
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 The purpose of this lab is to introduce the concept of FSMs with a datapath, and to   

study the usage of more complex test benches. Also, we enforce a rudimentary design   

methodology by assuming that the students are part of a bigger project, and have no   

knowledge of VHDL-implementation of the datapath (made by a hypothetical other   

group) other than its predefined Entity Interface until they come to the lab.   

The rest of this document is structured as follows: Section 2 describes some prelimi-  

nary reading and exercises that should be done before the lab. Section 3 details the   

design tasks that should be carried out to pass this lab.   


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下载文件列表

压缩包 : 109201266xx_new4.rar 列表
xx_new4\work\_info
xx_new4\work\alu\_primary.dat
xx_new4\work\alu\behaviour.dat
xx_new4\work\alu\behaviour.asm
xx_new4\work\alu
xx_new4\work\package_microassemblycode\_primary.dat
xx_new4\work\package_microassemblycode\_vhdl.asm
xx_new4\work\package_microassemblycode
xx_new4\work\regfile\_primary.dat
xx_new4\work\regfile\behaviour.dat
xx_new4\work\regfile\behaviour.asm
xx_new4\work\regfile
xx_new4\work\selector\_primary.dat
xx_new4\work\selector\behaviour.dat
xx_new4\work\selector\behaviour.asm
xx_new4\work\selector
xx_new4\work\shifter\_primary.dat
xx_new4\work\shifter\behaviour.dat
xx_new4\work\shifter\behaviour.asm
xx_new4\work\shifter
xx_new4\work\videocomposer\_primary.dat
xx_new4\work\videocomposer\composite.dat
xx_new4\work\videocomposer\composite.asm
xx_new4\work\videocomposer
xx_new4\work\videocomposer_fpga\_primary.dat
xx_new4\work\videocomposer_fpga\behaviour.dat
xx_new4\work\videocomposer_fpga\behaviour.asm
xx_new4\work\videocomposer_fpga
xx_new4\work\datapath\_primary.dat
xx_new4\work\datapath\behaviour.dat
xx_new4\work\datapath\behaviour.asm
xx_new4\work\datapath
xx_new4\work\single_port_rom\_primary.dat
xx_new4\work\single_port_rom\syn.dat
xx_new4\work\single_port_rom\syn.asm
xx_new4\work\single_port_rom
xx_new4\work\tb_videocomposer_93\_primary.dat
xx_new4\work\tb_videocomposer_93\tb_behaviour.dat
xx_new4\work\tb_videocomposer_93\tb_behaviour.asm
xx_new4\work\tb_videocomposer_93
xx_new4\work
xx_new4\videoComposer_fpga.vhd
xx_new4\alu.vhd
xx_new4\dataPath.vhd
xx_new4\package_microAssemblyCode.vhd
xx_new4\regFile.vhd
xx_new4\selector.vhd
xx_new4\shifter.vhd
xx_new4\single_port_rom.vhd
xx_new4\tb_videoComposer_93.vhd
xx_new4\videocomposer.vhd
xx_new4\lpm\_info
xx_new4\lpm\lpm_xor\lpm_syn.dat
xx_new4\lpm\lpm_xor\lpm_syn.psm
xx_new4\lpm\lpm_xor\_primary.dat
xx_new4\lpm\lpm_xor
xx_new4\lpm\lpm_shiftreg\lpm_syn.dat
xx_new4\lpm\lpm_shiftreg\lpm_syn.psm
xx_new4\lpm\lpm_shiftreg\_primary.dat
xx_new4\lpm\lpm_shiftreg
xx_new4\lpm\lpm_rom\lpm_syn.dat
xx_new4\lpm\lpm_rom\lpm_syn.psm
xx_new4\lpm\lpm_rom\_primary.dat
xx_new4\lpm\lpm_rom
xx_new4\lpm\lpm_ram_io\lpm_syn.dat
xx_new4\lpm\lpm_ram_io\lpm_syn.psm
xx_new4\lpm\lpm_ram_io\_primary.dat
xx_new4\lpm\lpm_ram_io
xx_new4\lpm\lpm_ram_dq\lpm_syn.dat
xx_new4\lpm\lpm_ram_dq\lpm_syn.psm
xx_new4\lpm\lpm_ram_dq\_primary.dat
xx_new4\lpm\lpm_ram_dq
xx_new4\lpm\lpm_ram_dp\lpm_syn.dat
xx_new4\lpm\lpm_ram_dp\lpm_syn.psm
xx_new4\lpm\lpm_ram_dp\_primary.dat
xx_new4\lpm\lpm_ram_dp
xx_new4\lpm\lpm_outpad\lpm_syn.dat
xx_new4\lpm\lpm_outpad\lpm_syn.psm
xx_new4\lpm\lpm_outpad\_primary.dat
xx_new4\lpm\lpm_outpad
xx_new4\lpm\lpm_or\lpm_syn.dat
xx_new4\lpm\lpm_or\lpm_syn.psm
xx_new4\lpm\lpm_or\_primary.dat
xx_new4\lpm\lpm_or
xx_new4\lpm\lpm_mux\lpm_syn.dat
xx_new4\lpm\lpm_mux\lpm_syn.psm
xx_new4\lpm\lpm_mux\_primary.dat
xx_new4\lpm\lpm_mux
xx_new4\lpm\lpm_mult\lpm_syn.dat
xx_new4\lpm\lpm_mult\lpm_syn.psm
xx_new4\lpm\lpm_mult\_primary.dat
xx_new4\lpm\lpm_mult
xx_new4\lpm\lpm_latch\lpm_syn.dat
xx_new4\lpm\lpm_latch\lpm_syn.psm
xx_new4\lpm\lpm_latch\_primary.dat
xx_new4\lpm\lpm_latch
xx_new4\lpm\lpm_inv\lpm_syn.dat
xx_new4\lpm\lpm_inv\lpm_syn.psm
xx_new4\lpm\lpm_inv\_primary.dat
xx_new4\lpm\lpm_inv
xx_new4\lpm\lpm_inpad\lpm_syn.dat
xx_new4\lpm\lpm_inpad\lpm_syn.psm
xx_new4\lpm\lpm_inpad\_primary.dat
xx_new4\lpm\lpm_inpad
xx_new4\lpm\lpm_hint_evaluation\body.dat
xx_new4\lpm\lpm_hint_evaluation\body.psm
xx_new4\lpm\lpm_hint_evaluation\_primary.dat
xx_new4\lpm\lpm_hint_evaluation\_vhdl.psm
xx_new4\lpm\lpm_hint_evaluation
xx_new4\lpm\lpm_fifo_dc_fefifo\behavior.dat
xx_new4\lpm\lpm_fifo_dc_fefifo\behavior.psm
xx_new4\lpm\lpm_fifo_dc_fefifo\_primary.dat
xx_new4\lpm\lpm_fifo_dc_fefifo
xx_new4\lpm\lpm_fifo_dc_dffpipe\behavior.dat
xx_new4\lpm\lpm_fifo_dc_dffpipe\behavior.psm
xx_new4\lpm\lpm_fifo_dc_dffpipe\_primary.dat
xx_new4\lpm\lpm_fifo_dc_dffpipe
xx_new4\lpm\lpm_fifo_dc_async\behavior.dat
xx_new4\lpm\lpm_fifo_dc_async\behavior.psm
xx_new4\lpm\lpm_fifo_dc_async\_primary.dat
xx_new4\lpm\lpm_fifo_dc_async
xx_new4\lpm\lpm_fifo_dc\behavior.dat
xx_new4\lpm\lpm_fifo_dc\behavior.psm
xx_new4\lpm\lpm_fifo_dc\_primary.dat
xx_new4\lpm\lpm_fifo_dc
xx_new4\lpm\lpm_fifo\behavior.dat
xx_new4\lpm\lpm_fifo\behavior.psm
xx_new4\lpm\lpm_fifo\_primary.dat
xx_new4\lpm\lpm_fifo
xx_new4\lpm\lpm_ff\lpm_syn.dat
xx_new4\lpm\lpm_ff\lpm_syn.psm
xx_new4\lpm\lpm_ff\_primary.dat
xx_new4\lpm\lpm_ff
xx_new4\lpm\lpm_divide\behave.dat
xx_new4\lpm\lpm_divide\behave.psm
xx_new4\lpm\lpm_divide\_primary.dat
xx_new4\lpm\lpm_divide
xx_new4\lpm\lpm_device_families\body.dat
xx_new4\lpm\lpm_device_families\body.psm
xx_new4\lpm\lpm_device_families\_primary.dat
xx_new4\lpm\lpm_device_families\_vhdl.psm
xx_new4\lpm\lpm_device_families
xx_new4\lpm\lpm_decode\lpm_syn.dat
xx_new4\lpm\lpm_decode\lpm_syn.psm
xx_new4\lpm\lpm_decode\_primary.dat
xx_new4\lpm\lpm_decode
xx_new4\lpm\lpm_counter\lpm_syn.dat
xx_new4\lpm\lpm_counter\lpm_syn.psm
xx_new4\lpm\lpm_counter\_primary.dat
xx_new4\lpm\lpm_counter
xx_new4\lpm\lpm_constant\lpm_syn.dat
xx_new4\lpm\lpm_constant\lpm_syn.psm
xx_new4\lpm\lpm_constant\_primary.dat
xx_new4\lpm\lpm_constant
xx_new4\lpm\lpm_components\_primary.dat
xx_new4\lpm\lpm_components\_vhdl.psm
xx_new4\lpm\lpm_components
xx_new4\lpm\lpm_compare_unsigned\lpm_syn.dat
xx_new4\lpm\lpm_compare_unsigned\lpm_syn.psm
xx_new4\lpm\lpm_compare_unsigned\_primary.dat
xx_new4\lpm\lpm_compare_unsigned
xx_new4\lpm\lpm_compare_signed\lpm_syn.dat
xx_new4\lpm\lpm_compare_signed\lpm_syn.psm
xx_new4\lpm\lpm_compare_signed\_primary.dat
xx_new4\lpm\lpm_compare_signed
xx_new4\lpm\lpm_compare\lpm_syn.dat
xx_new4\lpm\lpm_compare\lpm_syn.psm
xx_new4\lpm\lpm_compare\_primary.dat
xx_new4\lpm\lpm_compare
xx_new4\lpm\lpm_common_conversion\body.dat
xx_new4\lpm\lpm_common_conversion\body.psm
xx_new4\lpm\lpm_common_conversion\_primary.dat
xx_new4\lpm\lpm_common_conversion\_vhdl.psm
xx_new4\lpm\lpm_common_conversion
xx_new4\lpm\lpm_clshift\lpm_syn.dat
xx_new4\lpm\lpm_clshift\lpm_syn.psm
xx_new4\lpm\lpm_clshift\_primary.dat
xx_new4\lpm\lpm_clshift
xx_new4\lpm\lpm_bustri\lpm_syn.dat
xx_new4\lpm\lpm_bustri\lpm_syn.psm
xx_new4\lpm\lpm_bustri\_primary.dat
xx_new4\lpm\lpm_bustri
xx_new4\lpm\lpm_bipad\lpm_syn.dat
xx_new4\lpm\lpm_bipad\lpm_syn.psm
xx_new4\lpm\lpm_bipad\_primary.dat
xx_new4\lpm\lpm_bipad
xx_new4\lpm\lpm_and\lpm_syn.dat
xx_new4\lpm\lpm_and\lpm_syn.psm
xx_new4\lpm\lpm_and\_primary.dat
xx_new4\lpm\lpm_and
xx_new4\lpm\lpm_add_sub_unsigned\lpm_syn.dat
xx_new4\lpm\lpm_add_sub_unsigned\lpm_syn.psm
xx_new4\lpm\lpm_add_sub_unsigned\_primary.dat
xx_new4\lpm\lpm_add_sub_unsigned
xx_new4\lpm\lpm_add_sub_signed\lpm_syn.dat
xx_new4\lpm\lpm_add_sub_signed\lpm_syn.psm
xx_new4\lpm\lpm_add_sub_signed\_primary.dat
xx_new4\lpm\lpm_add_sub_signed
xx_new4\lpm\lpm_add_sub\lpm_syn.dat
xx_new4\lpm\lpm_add_sub\lpm_syn.psm
xx_new4\lpm\lpm_add_sub\_primary.dat
xx_new4\lpm\lpm_add_sub
xx_new4\lpm\lpm_abs\lpm_syn.dat
xx_new4\lpm\lpm_abs\lpm_syn.psm
xx_new4\lpm\lpm_abs\_primary.dat
xx_new4\lpm\lpm_abs
xx_new4\lpm
xx_new4\DATAPATH_LIB\_info
xx_new4\DATAPATH_LIB\DATAPATH_LIB\_info
xx_new4\DATAPATH_LIB\DATAPATH_LIB\datapath\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\datapath\behaviour.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\datapath\behaviour.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\datapath
xx_new4\DATAPATH_LIB\DATAPATH_LIB\alu\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\alu\behaviour.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\alu\behaviour.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\alu
xx_new4\DATAPATH_LIB\DATAPATH_LIB\shifter\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\shifter\behaviour.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\shifter\behaviour.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\shifter
xx_new4\DATAPATH_LIB\DATAPATH_LIB\selector\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\selector\behaviour.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\selector\behaviour.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\selector
xx_new4\DATAPATH_LIB\DATAPATH_LIB\regfile\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\regfile\behaviour.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\regfile\behaviour.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\regfile
xx_new4\DATAPATH_LIB\DATAPATH_LIB\package_microassemblycode\_primary.dat
xx_new4\DATAPATH_LIB\DATAPATH_LIB\package_microassemblycode\_vhdl.psm
xx_new4\DATAPATH_LIB\DATAPATH_LIB\package_microassemblycode
xx_new4\DATAPATH_LIB\DATAPATH_LIB
xx_new4\DATAPATH_LIB\package_microassemblycode\_primary.dat
xx_new4\DATAPATH_LIB\package_microassemblycode\_vhdl.psm
xx_new4\DATAPATH_LIB\package_microassemblycode\_vhdl.asm
xx_new4\DATAPATH_LIB\package_microassemblycode
xx_new4\DATAPATH_LIB\regfile\_primary.dat
xx_new4\DATAPATH_LIB\regfile\behaviour.dat
xx_new4\DATAPATH_LIB\regfile\behaviour.psm
xx_new4\DATAPATH_LIB\regfile
xx_new4\DATAPATH_LIB\selector\_primary.dat
xx_new4\DATAPATH_LIB\selector\behaviour.dat
xx_new4\DATAPATH_LIB\selector\behaviour.psm
xx_new4\DATAPATH_LIB\selector
xx_new4\DATAPATH_LIB\shifter\_primary.dat
xx_new4\DATAPATH_LIB\shifter\behaviour.dat
xx_new4\DATAPATH_LIB\shifter\behaviour.psm
xx_new4\DATAPATH_LIB\shifter
xx_new4\DATAPATH_LIB\alu\_primary.dat
xx_new4\DATAPATH_LIB\alu\behaviour.dat
xx_new4\DATAPATH_LIB\alu\behaviour.psm
xx_new4\DATAPATH_LIB\alu
xx_new4\DATAPATH_LIB\datapath\_primary.dat
xx_new4\DATAPATH_LIB\datapath\behaviour.dat
xx_new4\DATAPATH_LIB\datapath\behaviour.psm
xx_new4\DATAPATH_LIB\datapath
xx_new4\DATAPATH_LIB
xx_new4\DATAIN.PPM
xx_new4\xing.mpf
xx_new4\xing.cr.mti
xx_new4

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