文件名称:ram_fifo_ram

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 7.81mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 袁**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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程序实现了在FPGA内部开辟RAM+FIFO+RAM的IP核进行数据之间的调试。方便需要用到的童鞋进行参考。已通过modelsim调试-Implemented within the FPGA program to open up RAM+ FIFO+ RAM for data between the IP core debugging. Need to use the shoes for easy reference. Has passed debug modelsim
相关搜索: modelsim
RAM
ip
core

(系统自动生成,下载前可以参看下载内容)

下载文件列表

ram_fifo_ram

............\cis.gise

............\cis.xise

............\coregen.cgc

............\coregen.cgp

............\dcm.tfi

............\dcm.v

............\dcm_arwz.ucf

............\devide.v

............\ipcore_dir

............\..........\blk_mem_gen_ds512.pdf

............\..........\dcm.cgc

............\..........\dcm.cgp

............\..........\dcm.v

............\..........\dcm.xaw

............\..........\dcm_arwz.ucf

............\..........\dcm_flist.txt

............\..........\dcm_readme.txt

............\..........\dcm_xmdf.tcl

............\..........\fifo.asy

............\..........\fifo.cgc

............\..........\fifo.cgp

............\..........\fifo.gise

............\..........\fifo.ngc

............\..........\fifo.v

............\..........\fifo.veo

............\..........\fifo.vhd

............\..........\fifo.vho

............\..........\fifo.xco

............\..........\fifo.xise

............\..........\fifo_flist.txt

............\..........\fifo_generator_ug175.pdf

............\..........\fifo_readme.txt

............\..........\fifo_xmdf.tcl

............\..........\ram.asy

............\..........\ram.cgc

............\..........\ram.cgp

............\..........\ram.gise

............\..........\ram.ngc

............\..........\ram.v

............\..........\ram.veo

............\..........\ram.vhd

............\..........\ram.vho

............\..........\ram.xco

............\..........\ram.xise

............\..........\ram_flist.txt

............\..........\ram_readme.txt

............\..........\ram_xmdf.tcl

............\..........\tmp

............\..........\...\_cg

............\..........\xaw2verilog.log

............\..........\xlnx_auto_0_xdb

............\..........\_xmsgs

............\..........\......\ngcbuild.xmsgs

............\..........\......\pn_parser.xmsgs

............\..........\......\xst.xmsgs

............\iseconfig

............\.........\cis.projectmgr

............\.........\main.xreport

............\main.cmd_log

............\main.fdo

............\main.lso

............\main.ngc

............\main.ngr

............\main.prj

............\main.stx

............\main.syr

............\main.udo

............\main.v

............\main.xst

............\main_envsettings.html

............\main_summary.html

............\main_wave.fdo

............\main_xst.xrpt

............\transcript

............\vsim.wlf

............\webtalk_pn.xml

............\work

............\....\@_opt

............\....\.....\vopt01rend

............\....\.....\vopt06s9bc

............\....\.....\vopt09jemz

............\....\.....\vopt0d5ayh

............\....\.....\vopt0hh89z

............\....\.....\vopt0mf3cv

............\....\.....\vopt10wt1k

............\....\.....\vopt11bwgf

............\....\.....\vopt254rtx

............\....\.....\vopt277xrx

............\....\.....\vopt2j01zj

............\....\.....\vopt2nevst

............\....\.....\vopt31759z

............\....\.....\vopt35d3cc

............\....\.....\vopt36s5v8

............\....\.....\vopt3qq2x3

............\....\.....\vopt3qqh0h

............\....\.....\vopt3r80rx

............\....\.....\vopt4550cv

............\....\.....\vopt4b2xf6

............\....\.....\vopt4ghn1k

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