文件名称:my_test_rw_pack9

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-01-31
  • 文件大小:
  • 3.36mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • T**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

基于Verilog HDL的SDRAM控制器。

实验条件:

工具:Quartus II 6.0 ,SignalTap II

FPGA:Altera Cyclone EP1C12Q240C8N

SDRAM:HY57V283220T-6-SDRAM controller based on Verilog HDL.

Experimental conditions:

Tools: Quartus II 6.0, SignalTap II

FPGA: Altera Cyclone EP1C12Q240C8N

SDRAM: HY57V283220T-6
(系统自动生成,下载前可以参看下载内容)

下载文件列表





my_test_rw_pack9\00 read me.txt

................\datagene.bsf

................\datagene.v

................\.b\altsyncram_0ki2.tdf

................\..\altsyncram_1ki2.tdf

................\..\altsyncram_3ki2.tdf

................\..\altsyncram_5ki2.tdf

................\..\altsyncram_7ki2.tdf

................\..\altsyncram_dki2.tdf

................\..\altsyncram_dpi2.tdf

................\..\altsyncram_fki2.tdf

................\..\altsyncram_hmi2.tdf

................\..\altsyncram_lpi2.tdf

................\..\altsyncram_nji2.tdf

................\..\altsyncram_rmi2.tdf

................\..\altsyncram_vji2.tdf

................\..\cmpr_5mh.tdf

................\..\cmpr_fnh.tdf

................\..\cntr_3je.tdf

................\..\cntr_3jf.tdf

................\..\cntr_4ag.tdf

................\..\cntr_5af.tdf

................\..\cntr_dhe.tdf

................\..\cntr_dkf.tdf

................\..\cntr_ebg.tdf

................\..\cntr_f7f.tdf

................\..\cntr_fgh.tdf

................\..\cntr_hhe.tdf

................\..\cntr_ihe.tdf

................\..\cntr_jhe.tdf

................\..\cntr_khe.tdf

................\..\cntr_lhe.tdf

................\..\cntr_mhe.tdf

................\..\cntr_nhe.tdf

................\..\cntr_pdh.tdf

................\..\cntr_phe.tdf

................\..\cntr_qhe.tdf

................\..\cntr_vie.tdf

................\..\decode_ogi.tdf

................\..\test_rw_pack.asm.qmsg

................\..\test_rw_pack.cbx.xml

................\..\test_rw_pack.cmp.cdb

................\..\test_rw_pack.cmp.hdb

................\..\test_rw_pack.cmp.kpt

................\..\test_rw_pack.cmp.logdb

................\..\test_rw_pack.cmp.rdb

................\..\test_rw_pack.cmp.tdb

................\..\test_rw_pack.cmp0.ddb

................\..\test_rw_pack.dbp

................\..\test_rw_pack.db_info

................\..\test_rw_pack.eco.cdb

................\..\test_rw_pack.eds_overflow

................\..\test_rw_pack.fit.qmsg

................\..\test_rw_pack.hier_info

................\..\test_rw_pack.hif

................\..\test_rw_pack.map.cdb

................\..\test_rw_pack.map.hdb

................\..\test_rw_pack.map.logdb

................\..\test_rw_pack.map.qmsg

................\..\test_rw_pack.pre_map.cdb

................\..\test_rw_pack.pre_map.hdb

................\..\test_rw_pack.psp

................\..\test_rw_pack.pss

................\..\test_rw_pack.rtlv.hdb

................\..\test_rw_pack.rtlv_sg.cdb

................\..\test_rw_pack.rtlv_sg_swap.cdb

................\..\test_rw_pack.sgdiff.cdb

................\..\test_rw_pack.sgdiff.hdb

................\..\test_rw_pack.signalprobe.cdb

................\..\test_rw_pack.sim.hdb

................\..\test_rw_pack.sim.qmsg

................\..\test_rw_pack.sim.rdb

................\..\test_rw_pack.sim.vwf

................\..\test_rw_pack.sld_design_entry.sci

................\..\test_rw_pack.sld_design_entry_dsc.sci

................\..\test_rw_pack.smp_dump.txt

................\..\test_rw_pack.syn_hier_info

................\..\test_rw_pack.tan.qmsg

................\..\wed.zsf

................\PLLU.bsf

................\PLLU.cmp

................\PLLU.ppf

................\PLLU.v

................\PLLU_bb.v

................\PLLU_wave0.jpg

................\PLLU_waveforms.html

................\sdram_cmd.v

................\sdram_ctrl.v

................\sdram_wr_data.v

................\sdr_para.v

................\stp1.stp

................\test_rw_pack.asm.rpt

................\test_rw_pack.bdf

................\test_rw_pack.cdf

................\test_rw_pack.done

................\test_rw_pack.fit.rpt

................\test_rw_pack.fit.smsg

................\test_rw_pack.fit.summary

................\test_rw_pack.flow.rpt

................\test_rw_pack.map.rpt

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