文件名称:pci_bridge
介绍说明－－下载内容均来自于网络，请自行研究使用
基于WISHBONE的pci桥实现，包括功能模块和测试模块-Based on the pci bridge WISHBONE implementation, including functional modules and test modules
(系统自动生成,下载前可以参看下载内容)
下载文件列表
pci bridge\.svn\entries
..........\trunk\.svn\entries
..........\.....\apps\.svn\entries
..........\.....\....\test\.svn\entries
..........\.....\....\....\bench\.svn\all-wcprops
..........\.....\....\....\.....\....\entries
..........\.....\....\....\.....\verilog\.svn\all-wcprops
..........\.....\....\....\.....\.......\....\entries
..........\.....\....\....\.....\.......\....\prop-base\test_bench.v.svn-base
..........\.....\....\....\.....\.......\....\.........\timescale.v.svn-base
..........\.....\....\....\.....\.......\....\text-base\test_bench.v.svn-base
..........\.....\....\....\.....\.......\....\.........\timescale.v.svn-base
..........\.....\....\....\.....\.......\test_bench.v
..........\.....\....\....\.....\.......\timescale.v
..........\.....\....\....\rtl\.svn\all-wcprops
..........\.....\....\....\...\....\entries
..........\.....\....\....\...\verilog\.svn\all-wcprops
..........\.....\....\....\...\.......\....\entries
..........\.....\....\....\...\.......\....\prop-base\pci_test_top_1clk.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_user_constants.v.svn-base
..........\.....\....\....\...\.......\....\text-base\pci_bridge32.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_test_top_1clk.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_test_top_2clks.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_user_constants.v.svn-base
..........\.....\....\....\...\.......\....\.........\test.v.svn-base
..........\.....\....\....\...\.......\pci_bridge32.v
..........\.....\....\....\...\.......\pci_test_top_1clk.v
..........\.....\....\....\...\.......\pci_test_top_2clks.v
..........\.....\....\....\...\.......\pci_user_constants.v
..........\.....\....\....\...\.......\test.v
..........\.....\....\....\sim\.svn\entries
..........\.....\....\....\...\rtl_sim\.svn\entries
..........\.....\....\....\...\.......\run\.svn\all-wcprops
..........\.....\....\....\...\.......\...\....\entries
..........\.....\....\....\...\.......\...\....\prop-base\clean.svn-base
..........\.....\....\....\...\.......\...\....\.........\run_sim.scr.svn-base
..........\.....\....\....\...\.......\...\....\text-base\clean.svn-base
..........\.....\....\....\...\.......\...\....\.........\run_sim.scr.svn-base
..........\.....\....\....\...\.......\...\....\.mp\text-base\vsim.wlf.svn-base
..........\.....\....\....\...\.......\...\clean
..........\.....\....\....\...\.......\...\run_sim.scr
..........\.....\bench\.svn\all-wcprops
..........\.....\.....\....\entries
..........\.....\.....\verilog\.svn\all-wcprops
..........\.....\.....\.......\....\entries
..........\.....\.....\.......\....\prop-base\pci_blue_constants.vh.svn-base
..........\.....\.....\.......\....\.........\pci_blue_options.vh.svn-base
..........\.....\.....\.......\....\text-base\i2c_slave_model.v.svn-base
..........\.....\.....\.......\....\.........\pci_behavioral_pci2pci_bridge.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_device.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_master.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_target.v.svn-base
..........\.....\.....\.......\....\.........\pci_bench_common_tasks.v.svn-base
..........\.....\.....\.......\....\.........\pci_blue_arbiter.v.svn-base
..........\.....\.....\.......\....\.........\pci_blue_constants.vh.svn-base
..........\.....\.....\.......\....\.........\pci_blue_options.vh.svn-base
..........\.....\.....\.......\....\.........\pci_bus_monitor.v.svn-base
..........\.....\.....\.......\....\.........\pci_regression_constants.v.svn-base
..........\.....\.....\.......\....\.........\pci_testbench_defines.v.svn-base
..........\.....\.....\.......\....\.........\pci_unsupported_commands_master.v.svn-base
..........\.....\.....\.......\....\.........\system.v.svn-base
..........\.....\.....\.......\....\.........\top.v.svn-base
..........\.....\.....\.......\....\.........\wb_bus_mon.v.svn-base
..........\.....\.....\.......\....\.........\wb_master
..........\trunk\.svn\entries
..........\.....\apps\.svn\entries
..........\.....\....\test\.svn\entries
..........\.....\....\....\bench\.svn\all-wcprops
..........\.....\....\....\.....\....\entries
..........\.....\....\....\.....\verilog\.svn\all-wcprops
..........\.....\....\....\.....\.......\....\entries
..........\.....\....\....\.....\.......\....\prop-base\test_bench.v.svn-base
..........\.....\....\....\.....\.......\....\.........\timescale.v.svn-base
..........\.....\....\....\.....\.......\....\text-base\test_bench.v.svn-base
..........\.....\....\....\.....\.......\....\.........\timescale.v.svn-base
..........\.....\....\....\.....\.......\test_bench.v
..........\.....\....\....\.....\.......\timescale.v
..........\.....\....\....\rtl\.svn\all-wcprops
..........\.....\....\....\...\....\entries
..........\.....\....\....\...\verilog\.svn\all-wcprops
..........\.....\....\....\...\.......\....\entries
..........\.....\....\....\...\.......\....\prop-base\pci_test_top_1clk.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_user_constants.v.svn-base
..........\.....\....\....\...\.......\....\text-base\pci_bridge32.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_test_top_1clk.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_test_top_2clks.v.svn-base
..........\.....\....\....\...\.......\....\.........\pci_user_constants.v.svn-base
..........\.....\....\....\...\.......\....\.........\test.v.svn-base
..........\.....\....\....\...\.......\pci_bridge32.v
..........\.....\....\....\...\.......\pci_test_top_1clk.v
..........\.....\....\....\...\.......\pci_test_top_2clks.v
..........\.....\....\....\...\.......\pci_user_constants.v
..........\.....\....\....\...\.......\test.v
..........\.....\....\....\sim\.svn\entries
..........\.....\....\....\...\rtl_sim\.svn\entries
..........\.....\....\....\...\.......\run\.svn\all-wcprops
..........\.....\....\....\...\.......\...\....\entries
..........\.....\....\....\...\.......\...\....\prop-base\clean.svn-base
..........\.....\....\....\...\.......\...\....\.........\run_sim.scr.svn-base
..........\.....\....\....\...\.......\...\....\text-base\clean.svn-base
..........\.....\....\....\...\.......\...\....\.........\run_sim.scr.svn-base
..........\.....\....\....\...\.......\...\....\.mp\text-base\vsim.wlf.svn-base
..........\.....\....\....\...\.......\...\clean
..........\.....\....\....\...\.......\...\run_sim.scr
..........\.....\bench\.svn\all-wcprops
..........\.....\.....\....\entries
..........\.....\.....\verilog\.svn\all-wcprops
..........\.....\.....\.......\....\entries
..........\.....\.....\.......\....\prop-base\pci_blue_constants.vh.svn-base
..........\.....\.....\.......\....\.........\pci_blue_options.vh.svn-base
..........\.....\.....\.......\....\text-base\i2c_slave_model.v.svn-base
..........\.....\.....\.......\....\.........\pci_behavioral_pci2pci_bridge.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_device.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_master.v.svn-base
..........\.....\.....\.......\....\.........\pci_behaviorial_target.v.svn-base
..........\.....\.....\.......\....\.........\pci_bench_common_tasks.v.svn-base
..........\.....\.....\.......\....\.........\pci_blue_arbiter.v.svn-base
..........\.....\.....\.......\....\.........\pci_blue_constants.vh.svn-base
..........\.....\.....\.......\....\.........\pci_blue_options.vh.svn-base
..........\.....\.....\.......\....\.........\pci_bus_monitor.v.svn-base
..........\.....\.....\.......\....\.........\pci_regression_constants.v.svn-base
..........\.....\.....\.......\....\.........\pci_testbench_defines.v.svn-base
..........\.....\.....\.......\....\.........\pci_unsupported_commands_master.v.svn-base
..........\.....\.....\.......\....\.........\system.v.svn-base
..........\.....\.....\.......\....\.........\top.v.svn-base
..........\.....\.....\.......\....\.........\wb_bus_mon.v.svn-base
..........\.....\.....\.......\....\.........\wb_master