文件名称:stc
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stc设计与实现，也即时间增益放大的设计，工程中有很多用处。-the implention of stc
相关搜索： stc
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下载文件列表
stc\designer\impl1\ada01988-3.tmp
...\........\.....\ada01988-5.tmp
...\........\.....\ada03856-1.tmp
...\........\.....\ada03856-3.tmp
...\........\.....\adder.ide_des
...\........\.....\designer.log
...\........\.....\designer_gen_ba.log
...\........\.....\designer_synth_check.log
...\........\.....\ram256.ide_des
...\........\.....\read.ide_des
...\........\.....\simulation\postlayout\testbench\verilog.psm
...\........\.....\..........\..........\.........\_primary.dat
...\........\.....\..........\..........\.........\_primary.dbs
...\........\.....\..........\..........\.........\_primary.vhd
...\........\.....\..........\..........\.op\verilog.psm
...\........\.....\..........\..........\...\_primary.dat
...\........\.....\..........\..........\...\_primary.dbs
...\........\.....\..........\..........\...\_primary.vhd
...\........\.....\..........\..........\_info
...\........\.....\..........\..........\.temp\vlog8hf1ct
...\........\.....\..........\..........\.....\vloghh69wc
...\........\.....\..........\..........\_vmake
...\........\.....\testbench.ide_des
...\........\.....\top.adb
...\........\.....\....dtf\verify.log
...\........\.....\top.ide_des
...\........\.....\top.pdb
...\........\.....\top.pdb.depends
...\........\.....\top.tcl
...\........\.....\top_1.adb
...\........\.....\......dtf\verify.log
...\........\.....\top_1.ide_des
...\........\.....\top_1.pdb
...\........\.....\top_1.pdb.depends
...\........\.....\top_1_ba.sdf
...\........\.....\top_1_ba.v
...\........\.....\......fp\$$FlashPro_09421.L$$
...\........\.....\........\projectData\top_1.pdb
...\........\.....\........\top_1.log
...\........\.....\........\top_1.pro
...\........\.....\top_2.adb
...\........\.....\......dtf\verify.log
...\........\.....\top_2.ide_des
...\........\.....\top_2.pdb
...\........\.....\top_2.pdb.depends
...\........\.....\top_2_ba.sdf
...\........\.....\top_2_ba.sdf_max.csd
...\........\.....\top_2_ba.v
...\........\.....\top_ba.sdf
...\........\.....\top_ba.sdf_max.csd
...\........\.....\top_ba.v
...\........\.....\....fp\$$FlashPro_09421.L$$
...\........\.....\......\$$FlashPro_09423.L$$
...\........\.....\......\$$FlashPro_FPBBALTLPT1.L$$
...\........\.....\......\projectData\top.pdb
...\........\.....\......\top.log
...\........\.....\......\top.pro
...\........\.....\......_1\$$FlashPro_09421.L$$
...\........\.....\........\projectData\top.pdb
...\........\.....\........\top.log
...\........\.....\........\top.pro
...\........\.....\write2.ide_des
...\hdl\adder.txt
...\...\adder.v
...\...\read.v
...\...\test\testbench.v
...\...\....\test_read.v
...\...\....\test_write.v
...\...\testbench.v
...\...\top.v
...\...\write2.v
...\simulation\modelsim.ini
...\..........\modelsim.ini.sav
...\..........\modelsim.log
...\..........\postsynth\adder\verilog.psm
...\..........\.........\.....\_primary.dat
...\..........\.........\.....\_primary.dbs
...\..........\.........\.....\_primary.vhd
...\..........\.........\ram256\verilog.psm
...\..........\.........\......\_primary.dat
...\..........\.........\......\_primary.dbs
...\..........\.........\......\_primary.vhd
...\..........\.........\.ead\verilog.psm
...\..........\.........\....\_primary.dat
...\..........\.........\....\_primary.dbs
...\..........\.........\....\_primary.vhd
...\..........\.........\testbench\verilog.psm
...\..........\.........\.........\_primary.dat
...\..........\.........\.........\_primary.dbs
...\..........\.........\.........\_primary.vhd
...\..........\.........\.op\verilog.psm
...\..........\.........\...\_primary.dat
...\..........\.........\...\_primary.dbs
...\..........\.........\...\_primary.vhd
...\..........\.........\write2\verilog.psm
...\..........\.........\......\_primary.dat
...\..........\.........\......\_primary.dbs
...\..........\.........\......\_primary.vhd
...\..........\.........\_info
...\..........\.........\.temp\vlogk1iaqw
...\........\.....\ada01988-5.tmp
...\........\.....\ada03856-1.tmp
...\........\.....\ada03856-3.tmp
...\........\.....\adder.ide_des
...\........\.....\designer.log
...\........\.....\designer_gen_ba.log
...\........\.....\designer_synth_check.log
...\........\.....\ram256.ide_des
...\........\.....\read.ide_des
...\........\.....\simulation\postlayout\testbench\verilog.psm
...\........\.....\..........\..........\.........\_primary.dat
...\........\.....\..........\..........\.........\_primary.dbs
...\........\.....\..........\..........\.........\_primary.vhd
...\........\.....\..........\..........\.op\verilog.psm
...\........\.....\..........\..........\...\_primary.dat
...\........\.....\..........\..........\...\_primary.dbs
...\........\.....\..........\..........\...\_primary.vhd
...\........\.....\..........\..........\_info
...\........\.....\..........\..........\.temp\vlog8hf1ct
...\........\.....\..........\..........\.....\vloghh69wc
...\........\.....\..........\..........\_vmake
...\........\.....\testbench.ide_des
...\........\.....\top.adb
...\........\.....\....dtf\verify.log
...\........\.....\top.ide_des
...\........\.....\top.pdb
...\........\.....\top.pdb.depends
...\........\.....\top.tcl
...\........\.....\top_1.adb
...\........\.....\......dtf\verify.log
...\........\.....\top_1.ide_des
...\........\.....\top_1.pdb
...\........\.....\top_1.pdb.depends
...\........\.....\top_1_ba.sdf
...\........\.....\top_1_ba.v
...\........\.....\......fp\$$FlashPro_09421.L$$
...\........\.....\........\projectData\top_1.pdb
...\........\.....\........\top_1.log
...\........\.....\........\top_1.pro
...\........\.....\top_2.adb
...\........\.....\......dtf\verify.log
...\........\.....\top_2.ide_des
...\........\.....\top_2.pdb
...\........\.....\top_2.pdb.depends
...\........\.....\top_2_ba.sdf
...\........\.....\top_2_ba.sdf_max.csd
...\........\.....\top_2_ba.v
...\........\.....\top_ba.sdf
...\........\.....\top_ba.sdf_max.csd
...\........\.....\top_ba.v
...\........\.....\....fp\$$FlashPro_09421.L$$
...\........\.....\......\$$FlashPro_09423.L$$
...\........\.....\......\$$FlashPro_FPBBALTLPT1.L$$
...\........\.....\......\projectData\top.pdb
...\........\.....\......\top.log
...\........\.....\......\top.pro
...\........\.....\......_1\$$FlashPro_09421.L$$
...\........\.....\........\projectData\top.pdb
...\........\.....\........\top.log
...\........\.....\........\top.pro
...\........\.....\write2.ide_des
...\hdl\adder.txt
...\...\adder.v
...\...\read.v
...\...\test\testbench.v
...\...\....\test_read.v
...\...\....\test_write.v
...\...\testbench.v
...\...\top.v
...\...\write2.v
...\simulation\modelsim.ini
...\..........\modelsim.ini.sav
...\..........\modelsim.log
...\..........\postsynth\adder\verilog.psm
...\..........\.........\.....\_primary.dat
...\..........\.........\.....\_primary.dbs
...\..........\.........\.....\_primary.vhd
...\..........\.........\ram256\verilog.psm
...\..........\.........\......\_primary.dat
...\..........\.........\......\_primary.dbs
...\..........\.........\......\_primary.vhd
...\..........\.........\.ead\verilog.psm
...\..........\.........\....\_primary.dat
...\..........\.........\....\_primary.dbs
...\..........\.........\....\_primary.vhd
...\..........\.........\testbench\verilog.psm
...\..........\.........\.........\_primary.dat
...\..........\.........\.........\_primary.dbs
...\..........\.........\.........\_primary.vhd
...\..........\.........\.op\verilog.psm
...\..........\.........\...\_primary.dat
...\..........\.........\...\_primary.dbs
...\..........\.........\...\_primary.vhd
...\..........\.........\write2\verilog.psm
...\..........\.........\......\_primary.dat
...\..........\.........\......\_primary.dbs
...\..........\.........\......\_primary.vhd
...\..........\.........\_info
...\..........\.........\.temp\vlogk1iaqw