文件名称:xianbo

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 1.04mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • l*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

以DE2为平台,用QUARTUS软件实现一个数字陷波器-To DE2 as a platform, software with a digital QUARTUS notch filter
(系统自动生成,下载前可以参看下载内容)

下载文件列表

xianbo\220model.v

......\altera_mf.v

......\db\lvbo.db_info

......\..\lvbo.eco.cdb

......\..\lvbo.sld_design_entry.sci

......\..\mult_d2n.tdf

......\..\mult_v3n.tdf

......\..\prev_cmp_lvbo.asm.qmsg

......\..\prev_cmp_lvbo.fit.qmsg

......\..\prev_cmp_lvbo.map.qmsg

......\..\prev_cmp_lvbo.tan.qmsg

......\file.out

......\file0.out

......\file1.out

......\file2.out

......\input6.txt

......\input7.txt

......\lvbo.asm.rpt

......\lvbo.done

......\lvbo.dpf

......\lvbo.fit.rpt

......\lvbo.fit.smsg

......\lvbo.fit.summary

......\lvbo.flow.rpt

......\lvbo.map.rpt

......\lvbo.map.summary

......\lvbo.pin

......\lvbo.pof

......\lvbo.qpf

......\lvbo.qsf

......\lvbo.qws

......\lvbo.sof

......\lvbo.tan.rpt

......\lvbo.tan.summary

......\lvbo.v

......\lvbo_assignment_defaults.qdf

......\mult.v

......\mult_ip.v

......\mult_ip_bb.v

......\mult_y.v

......\mult_y_bb.v

......\pc_xb.cr.mti

......\pc_xb.mpf

......\prev_cmp_lvbo.qmsg

......\sin.txt

......\transcript

......\t_xianbo_iir.v

......\untitled.fda

......\vsim.wlf

......\worklib\@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s\_primary.dat

......\.......\..........................................\_primary.vhd

......\.......\..............m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n\_primary.dat

......\.......\...............................................\_primary.vhd

......\.......\...................m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n\_primary.dat

......\.......\...........................................................\_primary.vhd

......\.......\.l@p@m_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s\_primary.dat

......\.......\....................................\_primary.vhd

......\.......\........h@i@n@t_@e@v@a@l@u@a@t@i@o@n\verilog.asm

......\.......\....................................\_primary.dat

......\.......\....................................\_primary.vhd

......\.......\........m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n\_primary.dat

......\.......\................................................\_primary.vhd

......\.......\.m@f_cycloneiii_pll\_primary.dat

......\.......\...................\_primary.vhd

......\.......\.....pll_reg\_primary.dat

......\.......\............\_primary.vhd

......\.......\.....ram7x20_syn\_primary.dat

......\.......\................\_primary.vhd

......\.......\.....stratixiii_pll\_primary.dat

......\.......\...................\_primary.vhd

......\.......\.............._pll\_primary.dat

......\.......\..................\_primary.vhd

......\.......\............_pll\_primary.dat

......\.......\................\_primary.vhd

......\.......\alt3pram\_primary.dat

......\.......\........\_primary.vhd

......\.......\...accumulate\_primary.dat

......\.......\.............\_primary.vhd

......\.......\...cam\_primary.dat

......\.......\......\_primary.vhd

......\.......\....dr_rx\_primary.dat

......\.......\.........\_primary.vhd

......\.......\.......tx\_primary.dat

......\.......\.........\_primary.vhd

......\.......\....lklock\_primary.dat

......\.......\..........\_primary.vhd

......\.......\...ddio_bidir\_primary.dat

......\.......\.............\_primary.vhd

......\.......\........in\_primary.dat

......\.......\..........\_primary.vhd

......\.......\........out\_primary.dat

......\.......\...........\_primary.vhd

......\.......\....pram\_primary.dat

......\.......\........\_primary.vhd

......\.......\...fp_mult\_primary.dat

......\.......\..........\_primary.vhd

......\.......\...lvds_rx\_primary.dat

......\.......\..........\_primary.vhd

......\.......\........tx\_primary.dat

......\.......\..........\_primary.vhd

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