文件名称:IPcore

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [C/C++] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 5.21mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 郝**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

FPGA 的各种 ip core 供大家参考-FPGA various ip core for your reference
(系统自动生成,下载前可以参看下载内容)

下载文件列表

IP核\395_vgs.tar.gz

....\3des_vhdl.tar.gz

....\51\8051软核使用步骤.pdf

....\..\CPU_Core.vqm

....\ata.tar.gz

....\AVR_Core.tar.gz

....\camera.tar.gz

....\core_arm.tar.gz

....\i2c\bench\CVS\Entries

....\...\.....\...\Repository

....\...\.....\...\Root

....\...\.....\verilog\CVS\Entries

....\...\.....\.......\...\Repository

....\...\.....\.......\...\Root

....\...\.....\.......\i2c_slave_model.v

....\...\.....\.......\spi_slave_model.v

....\...\.....\.......\tst_bench_top.v

....\...\.....\.......\wb_master_model.v

....\...\CVS\Entries

....\...\...\Repository

....\...\...\Root

....\...\doc\CVS\Entries

....\...\...\...\Repository

....\...\...\...\Root

....\...\...\i2c_specs.pdf

....\...\...\src\CVS\Entries

....\...\...\...\...\Repository

....\...\...\...\...\Root

....\...\...\...\I2C_specs.doc

....\...\...umentation\CVS\Entries

....\...\.............\...\Repository

....\...\.............\...\Root

....\...\rtl\CVS\Entries

....\...\...\...\Repository

....\...\...\...\Root

....\...\...\verilog\CVS\Entries

....\...\...\.......\...\Repository

....\...\...\.......\...\Root

....\...\...\.......\i2c_master_bit_ctrl.v

....\...\...\.......\i2c_master_byte_ctrl.v

....\...\...\.......\i2c_master_defines.v

....\...\...\.......\i2c_master_top.v

....\...\...\.......\timescale.v

....\...\...\.hdl\CVS\Entries

....\...\...\....\...\Repository

....\...\...\....\...\Root

....\...\...\....\I2C.VHD

....\...\...\....\i2c_master_bit_ctrl.vhd

....\...\...\....\i2c_master_byte_ctrl.vhd

....\...\...\....\i2c_master_top.vhd

....\...\...\....\readme

....\...\...\....\tst_ds1621.vhd

....\...\sim\CVS\Entries

....\...\...\...\Repository

....\...\...\...\Root

....\...\...\i2c_verilog\CVS\Entries

....\...\...\...........\...\Repository

....\...\...\...........\...\Root

....\...\...\...........\run\bench.vcd

....\...\...\...........\...\CVS\Entries

....\...\...\...........\...\...\Repository

....\...\...\...........\...\...\Root

....\...\...\...........\...\INCA_libs\CVS\Entries

....\...\...\...........\...\.........\...\Repository

....\...\...\...........\...\.........\...\Root

....\...\...\...........\...\ncverilog.key

....\...\...\...........\...\ncverilog.log

....\...\...\...........\...\run

....\...\...\...........\...\waves\CVS\Entries

....\...\...\...........\...\.....\...\Repository

....\...\...\...........\...\.....\...\Root

....\...\.oftware\CVS\Entries

....\...\........\...\Repository

....\...\........\...\Root

....\...\........\drivers\CVS\Entries

....\...\........\.......\...\Repository

....\...\........\.......\...\Root

....\...\........\include\CVS\Entries

....\...\........\.......\...\Repository

....\...\........\.......\...\Root

....\...\........\.......\oc_i2c_master.h

....\...\verilog\CVS\Entries

....\...\.......\...\Repository

....\...\.......\...\Root

....\...\.hdl\CVS\Entries

....\...\....\...\Repository

....\...\....\...\Root

....\i2c.tar.gz

....\jtag.tar.gz

....\memory_cores.tar.gz

....\memory_cores2.tar.gz

....\memory_sizer.tar.gz

....\pci_core.tar.gz

....\sdram_ctrl.tar.gz

....\usb11.tar.gz

....\video_compression_systems.tar.gz

....\i2c\sim\i2c_verilog\run\INCA_libs\CVS

....\...\...\...........\...\waves\CVS

....\...\...\...........\...\CVS

....\...\...\...........\...\INCA_libs

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