文件名称:RTL

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 177kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • lia****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

基于fpga的uart设计,包含cpu的接口设计-Fpga-based uart design, including the CPU interface design
(系统自动生成,下载前可以参看下载内容)

下载文件列表

RTL\CPU_IF.VHD

...\FIFO\FIFO_8bitx2\blk_ram\blk_mem_8bitx2\doc\blk_mem_gen_ds512.pdf

...\....\...........\.......\..............\...\blk_mem_gen_v6_1_vinfo.html

...\....\...........\.......\blk_mem_8bitx2.asy

...\....\...........\.......\blk_mem_8bitx2.gise

...\....\...........\.......\blk_mem_8bitx2.ncf

...\....\...........\.......\blk_mem_8bitx2.ngc

...\....\...........\.......\blk_mem_8bitx2.vhd

...\....\...........\.......\blk_mem_8bitx2.vho

...\....\...........\.......\blk_mem_8bitx2.xco

...\....\...........\.......\blk_mem_8bitx2.xise

...\....\...........\.......\blk_mem_8bitx2_flist.txt

...\....\...........\.......\blk_mem_8bitx2_xmdf.tcl

...\....\...........\.......\blk_mem_gen_ds512.pdf

...\....\...........\.......\blk_mem_gen_readme.txt

...\....\...........\.......\coregen.cgp

...\....\...........\.......\tmp\_xmsgs\ngcbuild.xmsgs

...\....\...........\.......\...\......\pn_parser.xmsgs

...\....\...........\.......\...\......\xst.xmsgs

...\....\...........\.......\_xmsgs\pn_parser.xmsgs

...\....\...........\FIFO_8bitx2.vhd

...\....\..........4\blk ram\blk_mem_8bitx4\doc\blk_mem_gen_ds512.pdf

...\....\...........\.......\..............\...\blk_mem_gen_v6_1_vinfo.html

...\....\...........\.......\blk_mem_8bitx4.asy

...\....\...........\.......\blk_mem_8bitx4.gise

...\....\...........\.......\blk_mem_8bitx4.ncf

...\....\...........\.......\blk_mem_8bitx4.ngc

...\....\...........\.......\blk_mem_8bitx4.vhd

...\....\...........\.......\blk_mem_8bitx4.vho

...\....\...........\.......\blk_mem_8bitx4.xco

...\....\...........\.......\blk_mem_8bitx4.xise

...\....\...........\.......\blk_mem_8bitx4_flist.txt

...\....\...........\.......\blk_mem_8bitx4_xmdf.tcl

...\....\...........\.......\blk_mem_gen_ds512.pdf

...\....\...........\.......\blk_mem_gen_readme.txt

...\....\...........\.......\coregen.cgp

...\....\...........\.......\tmp\_xmsgs\ngcbuild.xmsgs

...\....\...........\.......\...\......\pn_parser.xmsgs

...\....\...........\.......\...\......\xst.xmsgs

...\....\...........\.......\_xmsgs\pn_parser.xmsgs

...\....\...........\FIFO_8bitx4.vhd

...\RX_IF.vhd

...\TOP_IF.VHD

...\TX_IF.vhd

...\FIFO\FIFO_8bitx2\blk_ram\blk_mem_8bitx2\doc

...\....\...........\.......\tmp\xlnx_auto_0_xdb

...\....\...........\.......\...\_cg

...\....\...........\.......\...\_xmsgs

...\....\..........4\blk ram\blk_mem_8bitx4\doc

...\....\...........\.......\tmp\xlnx_auto_0_xdb

...\....\...........\.......\...\_cg

...\....\...........\.......\...\_xmsgs

...\....\..........2\blk_ram\blk_mem_8bitx2

...\....\...........\.......\tmp

...\....\...........\.......\_xmsgs

...\....\..........4\blk ram\blk_mem_8bitx4

...\....\...........\.......\tmp

...\....\...........\.......\_xmsgs

...\....\..........2\blk_ram

...\....\..........4\blk ram

...\....\FIFO_8bitx2

...\....\FIFO_8bitx4

...\FIFO

RTL

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