文件名称:DPLL0227+V+qt6
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用一片CPLD实现数字锁相环,用VHDL或V语言.-with a DPLL CPLD, VHDL or V language.
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压缩包 : 39709589dpll0227 v qt6.rar 列表 DPLL0227+V+qt6 DPLL0227+V+qt6\db DPLL0227+V+qt6\db\dpll.(0).cnf.cdb DPLL0227+V+qt6\db\dpll.(0).cnf.hdb DPLL0227+V+qt6\db\dpll.asm.qmsg DPLL0227+V+qt6\db\dpll.cbx.xml DPLL0227+V+qt6\db\dpll.cmp.cdb DPLL0227+V+qt6\db\dpll.cmp.hdb DPLL0227+V+qt6\db\dpll.cmp.kpt DPLL0227+V+qt6\db\dpll.cmp.logdb DPLL0227+V+qt6\db\dpll.cmp.rdb DPLL0227+V+qt6\db\dpll.cmp.tdb DPLL0227+V+qt6\db\dpll.cmp0.ddb DPLL0227+V+qt6\db\dpll.dbp DPLL0227+V+qt6\db\dpll.db_info DPLL0227+V+qt6\db\dpll.eco.cdb DPLL0227+V+qt6\db\dpll.eds_overflow DPLL0227+V+qt6\db\dpll.fit.qmsg DPLL0227+V+qt6\db\dpll.hier_info DPLL0227+V+qt6\db\dpll.hif DPLL0227+V+qt6\db\dpll.map.cdb DPLL0227+V+qt6\db\dpll.map.hdb DPLL0227+V+qt6\db\dpll.map.logdb DPLL0227+V+qt6\db\dpll.map.qmsg DPLL0227+V+qt6\db\dpll.pre_map.cdb DPLL0227+V+qt6\db\dpll.pre_map.hdb DPLL0227+V+qt6\db\dpll.psp DPLL0227+V+qt6\db\dpll.rtlv.hdb DPLL0227+V+qt6\db\dpll.rtlv_sg.cdb DPLL0227+V+qt6\db\dpll.rtlv_sg_swap.cdb DPLL0227+V+qt6\db\dpll.sgdiff.cdb DPLL0227+V+qt6\db\dpll.sgdiff.hdb DPLL0227+V+qt6\db\dpll.signalprobe.cdb DPLL0227+V+qt6\db\dpll.sim.hdb DPLL0227+V+qt6\db\dpll.sim.qmsg DPLL0227+V+qt6\db\dpll.sim.rdb DPLL0227+V+qt6\db\dpll.sim.vwf DPLL0227+V+qt6\db\dpll.sld_design_entry.sci DPLL0227+V+qt6\db\dpll.sld_design_entry_dsc.sci DPLL0227+V+qt6\db\dpll.syn_hier_info DPLL0227+V+qt6\db\dpll.tan.qmsg DPLL0227+V+qt6\db\wed.zsf DPLL0227+V+qt6\dpll.acf DPLL0227+V+qt6\dpll.asm.rpt DPLL0227+V+qt6\dpll.done DPLL0227+V+qt6\dpll.fit.rpt DPLL0227+V+qt6\dpll.fit.smsg DPLL0227+V+qt6\dpll.fit.summary DPLL0227+V+qt6\dpll.flow.rpt DPLL0227+V+qt6\dpll.hif DPLL0227+V+qt6\dpll.map.rpt DPLL0227+V+qt6\dpll.map.summary DPLL0227+V+qt6\dpll.mmf DPLL0227+V+qt6\dpll.pin DPLL0227+V+qt6\dpll.pof DPLL0227+V+qt6\dpll.qpf DPLL0227+V+qt6\dpll.qsf DPLL0227+V+qt6\dpll.qws DPLL0227+V+qt6\dpll.sim.rpt DPLL0227+V+qt6\dpll.sof DPLL0227+V+qt6\dpll.tan.rpt DPLL0227+V+qt6\dpll.tan.summary DPLL0227+V+qt6\dpll.v DPLL0227+V+qt6\dpll.vwf DPLL0227+V+qt6\全数字锁相环的verilog源代码.doc