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- amba ahb master decoder
apb_bridge
- arm ambm 2.0 primecell算法 ahb 与 apb通讯的转换模块-arm ambm 2.0 primecell algorithm ahb conversion and communications module apb
CODE
- AHB总线下的slave ram的verilog代码-AHB bus slave ram verilog
AHB_Lite_PO
- AHB Lite specification of AMBA protocol
CAST_sdr_sdram_ctrl-xact
- Single Data Rate Mobile SDRAM Controller Core with AHB Interface
AMBA_V2.0_CN
- ARM公司高级微控制器总线体系（Advanced Microcontroller Bus Architecture AMBA ）规范中文版，包括ASB，AHB，APB总线-Senior ARM microcontroller bus system (Advanced Microcontroller Bus Architecture AMBA) specification, including the ASB, AHB, APB bu
masterdecoder
- AHB总线协议 Master实现代码，对于开发AHB总线的很有帮助-AHB bus protocol to achieve Master code, very helpful for the development of AHB bus
slaveAHB
- 基于ahb协议写的简单salve，水平有限莫怪啊-Ahb-based protocol to write a simple salve, is limited No wonder, then ah
apb2ahb
- verilog code for apb to ahb convert
Advanced_Buses
- multi-layer ahb descr iption
ahb_system_generator_latest.tar
- this project relates ahb
IHI0011A_AMBA_SPEC
- AMBA2.0规范. 研究和开发AHB总线相关的ASIC工程师可以参考-AMBA2.0 specifications. AHB bus-related research and development engineers can refer to the ASIC
AHB_SRRAM
- SSRAM with AHB bus interface source code
ahb2pvci
- ahb to pvci bridge, free code
eth
- 一个ahb接口的千兆以太网MAC，包括apb的配置接口-Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
AHBtoAPB
- amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
ahb_ram
- AHB接口的ram控制器，可靠性非常强。除了两个周期内发生读到写或写到读的极限情况（一般处理器设计中不会有这种传输方式），其他传输方式完全没有问题-AHB interface ram controller, reliability is very strong. In addition to occurring in two cycles read or write read write the limit (usually proce
arm9verilog
- AMBA AHB verilog Source code
ram_top
- arm ahb slave bus sram ip in verilog
AMBA
- 详细讲述了ARM总线体系，包括AHB，ASB，APB。-Detailed account of the ARM bus system, including AHB, ASB, APB.