搜索资源列表
Modelsim_timing_simulation_library
- 文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法-Article on how to add ModelSim simulation library, including the add xilinx, altera, actel the company
modelsim6.0
- 使用說明對於modelsim的如何操作和使用及安裝的如何安裝-ModelSim for use of how to operate and use and installation of how to install
DSP_BUILDER_DESIGN
- DSP Builder设计初步,介绍Matlab/DSP Builder及其设计流程，正弦信号发生器完整的设计过程，以及使用Matlab、quartusII\modelsim详细的仿真过程。-DSP Builder preliminary design, introduce Matlab/DSP Builder and its design flow, sinusoidal signal generator complete desig
modelsim
- 基于存储器的基4按频率抽取的fft 的vhdl描述 可以对连续数据流进行256点的fft -Memory based on the base 4 by the frequency of fft taken the VHDL descr iption of the continuous data stream can be carried out 256 point fft
1_070109140434
- modelsim 的使用教程，很详细讲解很清楚-the use of ModelSim Tutorial, in great detail to explain very clearly
modelsimstudy
- 关于MODELSIM的学习资料 希望对大家有用 -Of learning materials on the ModelSim hope useful for everyone
modelsim_ppt
- modelsim中文学习的ppt,属于电子EDA-ModelSim for Chinese language learning ppt, are e-EDA
altera_ram
- 本程序对如何使用altera系列芯片片上ram进行实例演示，采用Verilog HDL语言编写，并使用modelsim与quartus联合进行功能仿真。本原码是红色逻辑开发板的试验程序，值得一看。-This procedure of how to use the altera series chip-chip ram for example demonstration, using Verilog HDL language, and u
(Modelsim)simulation
- 这是关于VHDL编程仿真的东西,大家感兴趣的话可以下载.原文并不是这个名字,里边有三个文件.-This is a simulation on the VHDL programming things, everyone interested can be downloaded. This is not the original name, has three documents inside.
Modelsim
- 一个做FPGA时经常使用到的一个软件的介绍。-An FPGA to do often use to introduce a software.
QuartusIIandModelSim
- 本文主要描述了如何在QUARTUSII中输入程序文件，生成网表及标准延时文件，然后通过MODELSIM进行功能仿真与后仿真的过程，主要为图解，含全部代码及仿真波形。 -This article describes how to enter QUARTUSII program file, generate netlists and standard delay file, and then through the ModelSim for
CIC
- 介绍了积分梳状滤波器(CIC)设计，压缩包里面有程序的流程图，采用verilogHDL编写，在modelsim上可以实现仿真结果，非常不错-Introduced the integral comb filter (CIC) design, there are procedures for compressed packets flow chart, using verilogHDL prepared on the ModelSim si
CORDIC
- 介绍了CORDIC数字计算机的设计，采用的是verilogHDL,在modelsim上可以实现仿真验证，压缩包中包含CORDIC的工作结构图，比较详细-Introduced the CORDIC digital computer design, using the verilogHDL, can be achieved on the ModelSim simulation, compressed package that contain
add
- 介绍了carry_chain_adder，carry_skip_adder,ipple_carry_adder三种常用的加法器，采用verilogHDL语言，利用modelsim软件仿真验证，压缩包中包含有流程图-Introduced carry_chain_adder, carry_skip_adder, ipple_carry_adder three commonly used adder, using verilogHDL lan
multiple
- 介绍了几种常用的乘法器的设计，carry_save_mult，ripple_carry_mult等，压缩包中包含结构流程图，用verilogHDL语言，采用modelsim仿真验证-This paper introduces some commonly used multiplier design, carry_save_mult, ripple_carry_mult such as, compressed package that c
Synchronous_read_write_RAM
- Synchronous read write RAM verilog。经过modelsim se仿真。-Synchronous read write RAM verilog. Through simulation modelsim se.
AdderEmodelSim
- altera Quartus II modelSim 自動模擬搭配，內有範例。 (含電路) -altera Quartus II modelSim with automatic simulation, there are examples. (With circuit)
adder4
- verilog加法器,附加测试文件 可用modelsim 仿真实现-Verilog Adder, additional test file ModelSim simulation can be used to achieve
modelsimuse
- 一篇有关MODELSIM的用法的中文PDF文档，很有用。-An article on the usage of ModelSim Chinese PDF files, very useful.
Modelsimjaochen
- 一个很适合初学MOdelsim的资料噢,内容很好的,讲解详细,-A very suitable for beginner information ModelSim Oh, good content to explain in detail,