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ramchoice
- 多总线切换的VHDL代码。可用于多RAM的管理。-Multibus VHDL code switching. RAM can be used for multi-management.
viterbi
- 介绍了viterbi译码器的编解码器的设计，包括decoder.v,encoder.v.control.v,ram.v等，压缩 包里面有pdf说明-Introduced a viterbi decoder codec design, including decoder.v, encoder.v.control.v, ram.v and so on, there are pdf compression package descr ipti
fifo
- FIFO电路(first in，first out)，内部藏有１６ｂｉｔ×１６ｗｏｒｄ的Dual port RAM，依次读出已经写入的数据。因为不存在Address输入，所以请自行设计内藏的读写指针。由FIFO电路输出的EF信号(表示RAM内部的数据为空)和FF信号(表示RAM内部的数据为满)来表示RAM内部的状态，并且控制FIFO的输入信号WEN(写使能)和REN(读使能)。以及为了更好得控制FIFO电路，AEF(表示RAM内部的数据
Asynchronous_read_write_RAM
- Dual Port RAM Asynchronous Read/Write 经过modelsim仿真 -Dual Port RAM Asynchronous Read/Write through ModelSim Simulation
Synchronous_read_write_RAM
- Synchronous read write RAM verilog。经过modelsim se仿真。-Synchronous read write RAM verilog. Through simulation modelsim se.
DDram
- 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码-07 National Undergraduate Electronic Design Contest winning entries C title peripheral interface FPGA dual-port RAM part of source
RAMbroden
- 基于proteus的51单片机的RAM扩展仿真-Based on the Proteus 51 MCU RAM expansion simulation
ex1_RAMTest
- DSP2812的外部RAM实验测试程序，很好用的！-DSP2812 external RAM experimental test procedure, good use!
acordwithram
- 一个牛人写的很快且不用状态机的动态RAM接口,VHDL编写-A cow were to write quickly and do not have the state machine dynamic RAM interface, VHDL prepared
dul_ram(yk)
- 关于双口RAM的Verilog HDL源码-On the dual-port RAM in Verilog HDL source
DMA
- This example provides a descr iption of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data buf
PIC-read-and-write-SPC3-ram
- PIC芯片读写SPC3寄存器的程序,PIC芯片不支持外部存储器扩展功能，通过软件编程，实现读写外部存储器功能。-PIC chip to read and write registers SPC3 procedures, PIC chip does not support external memory expansion capabilities, through software programming, to achieve rea
51RAM
- 单片机扩展片外RAM,用到的芯片有373,62256这里包涵了测试与串口调试等程序,可以用于扩展调试与串口通讯调试等-Single-chip expansion of chip RAM, the chips used here have 373,62256 includes the testing and debugging, such as serial procedures, can be used to expand the de
dev
- linux下 双口ram驱动程序 2.4.18-linux under the dual-port ram driver 2.4.18
Wave_ROM
- 基于RAm的FPGA实现DDS,有测试文件-Ram realize the FPGA-based DDS, have the test paper
fifov1
- FIFO（先进先出队列）通常用于数据的缓存和用于容纳异步信号的频率或相位的差异。本FIFO的实现是利用 双口RAM 和读写地址产生模块来实现的.FIFO的接口信号包括异步的写时钟（wr_clk）和读时钟（rd_clk）、 与写时钟同步的写有效（wren）和写数据（wr_data） 、与读时钟同步的读有效（rden）和读数据（rd_data） 为了实现正确的读写和避免FIFO的上溢或下溢，给出与读时钟和写时钟分别同步的FIFO
f320f28335_FLASH_TO_RAM
- Copying Compiler Sections from Flash to RAM on the TMS320F28xxx DSCs 包括固件和说明-Copying Compiler Sections from Flash to RAM on the TMS320F28xxx DSCs include the firmware and instructions
RAM
- 所有的ram资料，化了很长时间找的 大家多多指教 -Ram all information of a very long time to find the exhibitions of the U.S.
RAM
- 基于单片机AT89S52系统的一些测试程序，用C语言编写的，自己已经做实验验证过了-Based on MCU AT89S52 system testing procedures, using C language, they have to do the experiment verified the
ram_256
- 在Quartus中实现256的RAM，经过实际的应用验证，没有问题的-Quartus achieved in 256 of the RAM, through the practical application of verification, no problem