[单片机(51,AVR,MSP430等)] MACH_DEM_XUNG

说明：MACH DO LUU LUONG NUOC GIUP BAN SU DUNG NGUON NUOC MOT CACH HIEU QUA VA TIET KIEM NHAT. TAI LIEU LA CODE ASM DUNG CHO VI XU LY 89V51
<HUY> 在 2025-11-22 上传 | 大小：1kb | 下载：0

[单片机(51,AVR,MSP430等)] mega16_board_drive

说明：AVR单片机MEGA16的常见外设驱动程序，C语言编写，在ICCavr开发环境下编译和运行。这些代码都经过测试可用。附带原理图，将来写驱动时只改一下IO口即可。-AVR microcontroller MEGA16 common peripheral drivers, C language, in ICCavr development environment to compile and run. These codes are tested are available. With schema
<楚立明> 在 2025-11-22 上传 | 大小：581kb | 下载：0

[单片机(51,AVR,MSP430等)] ADCInterfacing

说明：this the program of analog to digital conversion, and also consist of the proteus simulation -this is the program of analog to digital conversion, and also consist of the proteus simulation
<paul> 在 2025-11-22 上传 | 大小：256kb | 下载：0

[单片机(51,AVR,MSP430等)] DACInterfacing

说明：this the circuit and program of digital to analog conversion. it also consist of the proteus simulation files -this is the circuit and program of digital to analog conversion. it also consist of the proteus simulation files
<paul> 在 2025-11-22 上传 | 大小：194kb | 下载：0

[单片机(51,AVR,MSP430等)] LCDInterfacing

说明：this the program and circuits of lcd interfacing with 8051 microcontroller and it also consist of proteus simulation -this is the program and circuits of lcd interfacing with 8051 microcontroller and it also consist of proteus simulation
<paul> 在 2025-11-22 上传 | 大小：161kb | 下载：0

[单片机(51,AVR,MSP430等)] 7SEGKeypad

说明：this the program and source code of interfacing seven segment display and lcd using 8051.it also consist of the simulation files-this is the program and source code of interfacing seven segment display and lcd using 8051.it also consist of the simula
<paul> 在 2025-11-22 上传 | 大小：274kb | 下载：0

[单片机(51,AVR,MSP430等)] SerialRS232

说明：this the program and circuit for performing serial communication of two 8051 using the rs232 connector-this is the program and circuit for performing serial communication of two 8051 using the rs232 connector
<paul> 在 2025-11-22 上传 | 大小：205kb | 下载：0

[VHDL编程] mcu-fpga

说明：目录 FPGA & MCU 开发板介绍 实验1 QuartusII 软件应用 实验2 Keil C51 应用 实验3 字符型LCD YM1602 的应用 实验4 带字库的中文LCD YM12864 的应用 实验5 时钟芯片DS1302 的应用 实验6 I2C 总线器件AT24C64 的应用 实验7 数字温度传感器的应用 实验8 行列式键盘 实验9 硬件电子琴的设计 实验10 AD 与DA 的使用 实验11 简易DDS 信号源设计 实验12 用模
<lyy> 在 2025-11-22 上传 | 大小：1.56mb | 下载：0

[单片机(51,AVR,MSP430等)] uart0

说明：ATMEGA128的uart0串口通讯；能够实现与上位机通讯；用串口助手测试正常-ATMEGA128 Uart0 Series Communications
<jialong> 在 2025-11-22 上传 | 大小：41kb | 下载：0

[VHDL编程] foundatonise

说明：WATCHVER is a top level Verilog type project of a Stop Watch. DESIGN TYPE: Foundation ISE (chip V50 BG256 -6) -WATCHVER is a top level Verilog type project of a Stop Watch. DESIGN TYPE: Foundation ISE (chip V50 BG256-6)
<SEEDSTART> 在 2025-11-22 上传 | 大小：121kb | 下载：0

[VHDL编程] ModelsimVHDLWatch

说明：This tutorial is a part of a series of tutorials provided by Xilinx to lead the user through the Xilinx FPGA Design Flow. This archive contains the necessary design files to perform the tutorial.-This tutorial is a part of a series of tutorials p
<SEEDSTART> 在 2025-11-22 上传 | 大小：180kb | 下载：0

[嵌入式/单片机编程] CadenceWatch

说明：The design used in this tutorial is a hierarchical, HDL-based design. The top-level design file is an HDL file that references several other lower-level macros. The lower-level macros are either HDL modules or CORE Generator modules.
<SEEDSTART> 在 2025-11-22 上传 | 大小：385kb | 下载：0