[其他嵌入式/单片机内容] MAIN

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this is the main file which is heart of this project.-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this is the main file
<valiantyasir> 在 2026-01-21 上传 | 大小：1kb | 下载：0

[其他嵌入式/单片机内容] delay

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for delay.-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for delay.
<valiantyasir> 在 2026-01-21 上传 | 大小：1kb | 下载：0

[其他嵌入式/单片机内容] SPI_SLAVE

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is for slave .-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is for slave .
<valiantyasir> 在 2026-01-21 上传 | 大小：1kb | 下载：0

[其他嵌入式/单片机内容] SPI_MASTER

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for spi master-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for spi master
<valiantyasir> 在 2026-01-21 上传 | 大小：2kb | 下载：0

[VHDL编程] SequentialCircuitDesign_withVerilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-21 上传 | 大小：292kb | 下载：0

[VHDL编程] tut_quartus_intro_verilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-21 上传 | 大小：800kb | 下载：0

[VHDL编程] tut_timing_verilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-21 上传 | 大小：361kb | 下载：0

[其他嵌入式/单片机内容] LCDdisplay

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is the lcd file to display the communication between two spis.-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this f
<valiantyasir> 在 2026-01-21 上传 | 大小：2kb | 下载：0

[VHDL编程] Verilog_VHDL_Golden_Reference_Guide

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-21 上传 | 大小：272kb | 下载：0

[DSP编程] tsktest

说明：使用dsp/bios 的一个简单tsk例程-dsp/bios tsk
<周erin> 在 2026-01-21 上传 | 大小：59kb | 下载：0

[嵌入式/单片机编程] 144023___ebook.real-time_embedded_multithreading.

说明：Real-Time Embedded Multithreading: Using ThreadX® and ARM® -Real-Time Embedded Multithreading: Using ThreadX® and ARM®
<dddd> 在 2026-01-21 上传 | 大小：1.63mb | 下载：0

[单片机(51,AVR,MSP430等)] UART0_PC

说明：LPC2214 串口驱动程序,列子中详细的给出了demo-LPC2214 uart driver
<weixing> 在 2026-01-21 上传 | 大小：85kb | 下载：0