资源列表
[单片机(51,AVR,MSP430等)] NTCDNSopenwithPROTEUS7.4SP3
说明：一个数码管与NTC的应用实例,数字的显示在PROTEUS里面是反向的-A digital control and application of NTC, the figures show that there is a reverse in the PROTEUS<lixiaoying> 在 2025-06-01 上传 | 大小：1.03mb | 下载：0
[单片机(51,AVR,MSP430等)] 1602shizhong
说明：时钟电路和程序，mega6+lcd1602-Clock circuit and procedures, mega6+ lcd1602<zjs> 在 2025-06-01 上传 | 大小：27kb | 下载：0
[单片机(51,AVR,MSP430等)] jianliuji
说明：msp430的上位机程序，接到430传来的电压数据，用检流计的形式显示-procedures of the host computer msp430, 430 received from the voltage data, using the form of galvanometer shows<kim> 在 2025-06-01 上传 | 大小：7.11mb | 下载：0
[DSP编程] Vector_Variable_Frequency_System_Based_on_TMS320F
说明：This paper analyzes the vector control theory of asynchronous motors based on the magnetic orientation of motor rotors, and its mathematical model is made. Then the variable frequency vector speed-adjusting experimental<gsbnd> 在 2025-06-01 上传 | 大小：99kb | 下载：0
[其他嵌入式/单片机内容] FPGA
说明：嵌入式简介，是初学嵌入式的好东西，FPGA-Embedded Profile is embedded learning good things, FPGA<zjs> 在 2025-06-01 上传 | 大小：972kb | 下载：0
[单片机(51,AVR,MSP430等)] JiyuCANbusECUdesign
说明：基于CAN总线的汽车控制器ECU的设计开发实例，给设计人员会有很大的帮助-Based on the vehicle CAN Bus ECU controller design and development examples, to the designers will be of great help<lfw> 在 2025-06-01 上传 | 大小：13kb | 下载：0
[单片机(51,AVR,MSP430等)] J1939
说明：基于J1939的汽车CAN总线教学实验系统 无忧电子开发网-技术文章-J1939-based CAN bus vehicles to worry about e-teaching experimental system Development Network- Technical Article<lfw> 在 2025-06-01 上传 | 大小：9kb | 下载：0
[VHDL编程] All_Digital_DC2DC_Converters_on_FPGA
说明：The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. In this paper, based on the FPGA platform, The theoretical analysis, characteristics, simulation and design consideration<gsbnd> 在 2025-06-01 上传 | 大小：113kb | 下载：0
[单片机(51,AVR,MSP430等)] Infineon16CAN
说明：基于Infineon 16位单片机下CAN总线网络实现-Infineon 16-bit MCU based on the CAN bus network under the<lfw> 在 2025-06-01 上传 | 大小：285kb | 下载：0
[VHDL编程] FPGA_NEW_APPROACH_TO_IMPLEMENT_CHAOTIC_GENERATOR.
说明：In this paper, a new method is introduced to implement chaotic generators based on the Henon map and Lorenz chaotic generators given by the state equations using the Field Programmable Gate Array (FPGA). The aim of this<gsbnd> 在 2025-06-01 上传 | 大小：248kb | 下载：0
[VHDL编程] Pseudo-Random_Bit_Sequence_Generator_by_FPGA
说明：A spatiotemporal chaotic map is digitized to develop a highly paralleled PRBS generator that accommodates to FPGA (Field Programmable Gate Array) implementation in present paper.<gsbnd> 在 2025-06-01 上传 | 大小：105kb | 下载：0