资源列表
[VHDL编程] DSP_h264_VariableBlockSize
说明:這是用verilog HDL實現H.264可變block大小的源碼。為了使其能在FPGA上運作,還加入了我自己的改善。-A verilog HDL code for H.264 with variable block size and my own improvement.<Chung-Hao Wu> 在 2025-06-12 上传 | 大小:256kb | 下载:0
[VHDL编程] RS232_ysd
说明:串口接口控制器参考设计VHDL代码,方便开发FPGA人员进行串口的开发,是一个不错的源码解压安装后可在quartus里例化使用-Serial interface controller reference design VHDL code, facilitate the development of FPGA serial port staff development, is a good source decompression after installation in case of use<叶开> 在 2025-06-12 上传 | 大小:1.29mb | 下载:0
[VHDL编程] DS18B20_ysd
说明:在quartusII下开发的DS12B20_vsd的verilog程序,方便大家的学习。-Developed under the quartusII DS12B20_vsd the verilog program to facilitate everyone' s learning.<叶开> 在 2025-06-12 上传 | 大小:2.13mb | 下载:0
[VHDL编程] VGA_ysd
说明:vga接口控制器参考设计VHDL代码,方便开发FPGA人员进行vga的开发,是一个不错的源码解压安装后可在quartus里例化使用-vga interface controller reference design for VHDL code, and facilitate the development of FPGA vga staff development, is a good source installed after decompression in the case of usi<叶开> 在 2025-06-12 上传 | 大小:4.06mb | 下载:0
[VHDL编程] lcd12864_EP3C10
说明:在quartusII下开发的lcd12864的verilog程序,方便大家的学习。本程序基于EP3C10T144芯片-Developed under the quartusII lcd12864 the verilog program to facilitate everyone' s learning. The program is based on EP3C10T144 chip<叶开> 在 2025-06-12 上传 | 大小:702kb | 下载:0