[VHDL编程] code

说明：Verilog 代码 读写时钟同步 复杂三台总线建模-Verilog code to read and write three bus clock synchronization modeling complex
<xiaowang> 在 2025-12-25 上传 | 大小：55kb | 下载：0

[VHDL编程] 4Verilog-HDL-

说明：4位加法器的实现用于FPGA的开发环境 欢迎大家使用 非常感谢-4-bit adder to achieve a development environment for FPGA welcome to use thanks
<qin> 在 2025-12-25 上传 | 大小：5kb | 下载：0

[VHDL编程] AN128

说明：AMBA Application Note: AN128 - Logic Tile Flashing LED design. -AMBA Application Note: AN128- Logic Tile Flashing LED design. Application note AN128 is a simple flashing LED example design to demonstrate the process of creating FPGA images
<余曉民> 在 2025-12-25 上传 | 大小：35.05mb | 下载：0

[VHDL编程] AN148

说明：AMBA Application Note: AN148 - Using EB with CT7TDMI, CT926EJ-S, and CT1136JF-S Core Tiles.-AMBA Application Note: AN148- Using EB with CT7TDMI, CT926EJ-S, and CT1136JF-S Core Tiles. This example shows how to use the EB baseboard with CT7TDMI, CT92
<余曉民> 在 2025-12-25 上传 | 大小：27.51mb | 下载：0

[VHDL编程] AN151

说明：AMBA Application Note: AN151 - Using EB with example AXI Logic Tile. -AMBA Application Note: AN151- Using EB with example AXI Logic Tile. This example shows how to use the EB baseboard with an example AXI Logic Tile. The following board c
<余曉民> 在 2025-12-25 上传 | 大小：13.24mb | 下载：0

[VHDL编程] AN152

说明：AMBA Application Note: AN152 - Using EB with CT11MPCore Core Tile. -This example shows how to use the EB baseboard with a CT11MPCore Core Tile. AMBA Application Note: AN152- Using EB with CT11MPCore Core Tile. The following board combinat
<余曉民> 在 2025-12-25 上传 | 大小：13.71mb | 下载：0

[VHDL编程] AN158

说明：AMBA Application Note: AN158 - Using EB with CT1156T2F-S Core Tile. -AMBA Application Note: AN158- Using EB with CT1156T2F-S Core Tile. This example shows how to use the EB baseboard with a CT1156T2F-S Core Tile. The following board combinat
<余曉民> 在 2025-12-25 上传 | 大小：15.23mb | 下载：0

[VHDL编程] AN170

说明：AMBA Application Note: AN170 - AHB masters and slaves design for Virtex 4 and Virtex 5 Logic Tiles. -AMBA Application Note: AN170- AHB masters and slaves design for Virtex 4 and Virtex 5 Logic Tiles. This example shows how to implement AHB
<余曉民> 在 2025-12-25 上传 | 大小：5.32mb | 下载：0

[VHDL编程] AN177

说明：AMBA Application Note: AN177 - Using EB with CT1176JZF-S Core Tile. -AMBA Application Note: AN177- Using EB with CT1176JZF-S Core Tile. This example shows how to use the EB baseboard with a CT1176JZF-S Core Tile. The following board combi
<余曉民> 在 2025-12-25 上传 | 大小：15.66mb | 下载：0

[VHDL编程] AN217

说明：AMBA Application Note: AN217 - Using EB with CT-R4F Core Tile. -AMBA Application Note: AN217- Using EB with CT-R4F Core Tile. This example shows how to use the EB baseboard with a CT-R4F Core Tile. The following board combination is suppo
<余曉民> 在 2025-12-25 上传 | 大小：16.43mb | 下载：0

[VHDL编程] startstopwatch

说明：运动计时器的设计（1）在四个七段LED数码管上显示分钟和秒，最长的计时时间为59：59。 （2）按下清零按键，在四个七段LED数码管上显示的时间为00：00。 （3）按下启动/暂停按键，则启动或暂停计时器计时。其功能与实际的计时器的开始/停止按钮功能相同。设计一个能显示分、秒的计时器。在四个七段LED数码管上显示出来。-Sports timer design (1) in the four seven-segment LED digital display minutes and sec
<吴凡> 在 2025-12-25 上传 | 大小：1kb | 下载：0

[VHDL编程] show1234

说明：：在四个七段LED数码管上显示数字“1234”-: In the four seven-segment LED digital display the number " 1234"
<吴凡> 在 2025-12-25 上传 | 大小：1kb | 下载：0