资源列表
[VHDL编程] seg7_controller
说明:DE2_70FPGA开发板上实现IP核创建,可以初步理解嵌入式操作系统的使用,尝试软硬结合的运用-IP core to create DE2_70FPGA development board on implementation, can preliminary understanding the use of embedded operating system, try to combine the use of hard and soft<wangxing> 在 2025-06-22 上传 | 大小:17.67mb | 下载:0
[VHDL编程] VerilogHDL
说明:VerilogHDL程序设计教程,pdf文件格式-VerilogHDL programming tutorial pdf file format<龙腾> 在 2025-06-22 上传 | 大小:10.36mb | 下载:0
[VHDL编程] ddr_top
说明: This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and functionality through the<LJ> 在 2025-06-22 上传 | 大小:2kb | 下载:0
[VHDL编程] ddr_sig
说明: This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and functionality through the<LJ> 在 2025-06-22 上传 | 大小:2kb | 下载:0
[VHDL编程] ddr_data
说明: This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and functionality through the<LJ> 在 2025-06-22 上传 | 大小:3kb | 下载:0