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[VHDL编程] VGA_INTERFACE
说明:用Verilog HDL写的VGA控制器,基于Avalon总线-The VGA Controller based on Avalon<冉学均> 在 2025-06-13 上传 | 大小:13kb | 下载:0
[VHDL编程] verilogRS
说明:该文件为基于fpga的RS(204.188)译码器的verilong源代码,使用的Quartus II的开发环境,已经通过编译,需要者可以自己下载在编译简历工程使用-The document is based on fpga' s RS (204.188) decoder verilong source code, use the Quartus II development environment, has been compiled by the need to download th<bobo> 在 2025-06-13 上传 | 大小:13kb | 下载:0
[VHDL编程] Priority_Encoder
说明:Unlike a multiplexer that selects one individual data input line and then sends that data to a single output line or switch, an Encoder takes all the data inputs one at a time and converts them to a single encoded output. Then, it is a multi-input da<VLSI> 在 2025-06-13 上传 | 大小:13kb | 下载:0
[VHDL编程] yejingdeng
说明:液晶时钟 连线方式:将拨码开关的第6脚拨向"ON"方向,即给lcd供电-Crystal clock attachment: dial 6 feet of code switch to "ON", namely to LCD power supply<yang> 在 2025-06-13 上传 | 大小:13kb | 下载:0