资源列表
[VHDL编程] EDA_FPGA_363
说明:FPGA 视频采集代码 寄存器, 视频采集卡 主程序-FPGA verilog<yutian> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] arm_move
说明:An effort has been made to design a robot, which loads and unloads an object to the station depending on the request. The sensor connected to the robot will sense the request and initiate the correct sequence of operation. The robot under design has<joja> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] picoblaze_uart_Source_code
说明:用Picoblaze做的串口操作与控制程序,用VHDL语言编写,调试通过。-Serial do with Picoblaze operation and control procedures, using VHDL language, through debugging.<wangnan> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] mem64_to_pcitarget_verilog
说明:This design example shows possible interface between instantiation of Altera s 64-bit pci target megafunction and 64-bit synchronous memory -This design example shows possible interface between instantiation of Altera s 64-bit pci target megafunctio<minitman> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] alu4bitsynthesizable
说明:its a 4 bit arithmetic nd logical unit code in verilog. the software which is used for it is xilinx<swapna> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] LIP1732CORE_system_mbus_arbiter
说明:System Verilog M bus arbiter module<jc> 在 2025-07-23 上传 | 大小:26kb | 下载:0
[VHDL编程] 8-3encoder
说明:二进制译码器只显示0,1。十进制译码器显示0-9、显示译码器显示0—F -Show only 0,1 binary decoder. Showing 0-9 decimal decoder, display decoder display 0-F<袁欢> 在 2025-07-23 上传 | 大小:26kb | 下载:0