资源列表
[VHDL编程] elecoclock
说明:VHDL多功能时钟设计~~24小时制~带闹钟-VHDL design of multi-functional clock ~ ~ ~ 24 hours with alarm system<jecky> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] ADC0809
说明:ADC0809,完整的功能描述,每0.5秒采样一次,并显示出来。外置ADC0809芯片,-ADC0809, a complete functional descr iption of each sampling time 0.5 seconds, and displayed. ADC0809 external chip<heshuiming> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] filter_verilog
说明:用verilog实现的低通滤波器,输入输出精度为64位,并附有测试程序。-Use verilog to achieve a low-pass filter, input and output accuracy of 64, together with testing procedures.<周峰> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] multipler3
说明:一个用Verilog语言实现的三位二进制选举法。包含工程文件和实现文档。-One with the Verilog language implementation of the three binary electoral law. And the achievement of the document contains the project file.<文闯> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] SRAM_Control
说明:VHDL Code for SRAM Control (Synthesized with Synplify-Pro, Active-HDL Simulation)<DongHee Kim> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] jkandTflipflop
说明:this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for e<jatab> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] fpgavgavhdl
说明:fpga驱动vga接口的vhdl语言实现,实现彩条及方块-fpga driver vga interface vhdl language implementation to achieve color bar and the box<万小中> 在 2025-06-17 上传 | 大小:81kb | 下载:0
[VHDL编程] 11912890arith_lib_cadence
说明:VHDL中的一些常用功能块,源码,以及一些常用库,好多好多的。-VHDL some of the common functional blocks, source code, as well as some common libraries, many many of the.<Lzhou> 在 2025-06-17 上传 | 大小:81kb | 下载:0