文件名称:LFSR
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verilog实现的8阶伪随机序列发生器，文件包含了三种主要模块：控制模块，ROM模块，线性反馈移位寄存器（LFSR）模块。已经通过modelsim仿真验证。-verilog to achieve 8-order pseudo-random sequence generator, the file contains three main modules: control module, ROM modules, a linear feedback shift register (LFSR) module. Has passed modelsim simulation.
相关搜索： lfsr
verilog
LFSR
in
verilog
lfsr
verilog
Verilog
Generator
Verilog
ROM
lfsr
verilog
Verilog
LFSR
LFSR
vhdl
random
sequence
generator
相关搜索： lfsr
verilog
LFSR
in
verilog
lfsr
verilog
Verilog
Generator
Verilog
ROM
lfsr
verilog
Verilog
LFSR
LFSR
vhdl
random
sequence
generator
(系统自动生成,下载前可以参看下载内容)
下载文件列表
伪随机序列发生器\control.v
................\control.v.bak
................\db\lfsr.cbx.xml
................\..\lfsr.cmp.rdb
................\..\lfsr.db_info
................\..\lfsr.eco.cdb
................\..\lfsr.eds_overflow
................\..\lfsr.fnsim.cdb
................\..\lfsr.fnsim.hdb
................\..\lfsr.fnsim.qmsg
................\..\lfsr.hier_info
................\..\lfsr.hif
................\..\lfsr.map.qmsg
................\..\lfsr.map_bb.hdb
................\..\lfsr.map_bb.hdbx
................\..\lfsr.pre_map.cdb
................\..\lfsr.pre_map.hdb
................\..\lfsr.psp
................\..\lfsr.rtlv.hdb
................\..\lfsr.rtlv_sg.cdb
................\..\lfsr.rtlv_sg_swap.cdb
................\..\lfsr.sim.hdb
................\..\lfsr.sim.qmsg
................\..\lfsr.sim.rdb
................\..\lfsr.simfam
................\..\lfsr.sim_ori.vwf
................\..\lfsr.sld_design_entry.sci
................\..\lfsr.sld_design_entry_dsc.sci
................\..\lfsr.tis_db_list.ddb
................\..\lfsr.tmw_info
................\..\mux_dqc.tdf
................\..\prev_cmp_lfsr.map.qmsg
................\..\prev_cmp_lfsr.qmsg
................\..\prev_cmp_lfsr.sim.qmsg
................\..\wed.wsf
................\incremental_db\README
................\lfsr.done
................\lfsr.flow.rpt
................\lfsr.map.rpt
................\lfsr.map.smsg
................\lfsr.map.summary
................\lfsr.qpf
................\lfsr.qsf
................\lfsr.qws
................\lfsr.sim.rpt
................\lfsr.v
................\lfsr.v.bak
................\lfsr.vwf
................\rom.v
................\sr.v
................\incremental_db\compiled_partitions
................\db
................\incremental_db
伪随机序列发生器
................\control.v.bak
................\db\lfsr.cbx.xml
................\..\lfsr.cmp.rdb
................\..\lfsr.db_info
................\..\lfsr.eco.cdb
................\..\lfsr.eds_overflow
................\..\lfsr.fnsim.cdb
................\..\lfsr.fnsim.hdb
................\..\lfsr.fnsim.qmsg
................\..\lfsr.hier_info
................\..\lfsr.hif
................\..\lfsr.map.qmsg
................\..\lfsr.map_bb.hdb
................\..\lfsr.map_bb.hdbx
................\..\lfsr.pre_map.cdb
................\..\lfsr.pre_map.hdb
................\..\lfsr.psp
................\..\lfsr.rtlv.hdb
................\..\lfsr.rtlv_sg.cdb
................\..\lfsr.rtlv_sg_swap.cdb
................\..\lfsr.sim.hdb
................\..\lfsr.sim.qmsg
................\..\lfsr.sim.rdb
................\..\lfsr.simfam
................\..\lfsr.sim_ori.vwf
................\..\lfsr.sld_design_entry.sci
................\..\lfsr.sld_design_entry_dsc.sci
................\..\lfsr.tis_db_list.ddb
................\..\lfsr.tmw_info
................\..\mux_dqc.tdf
................\..\prev_cmp_lfsr.map.qmsg
................\..\prev_cmp_lfsr.qmsg
................\..\prev_cmp_lfsr.sim.qmsg
................\..\wed.wsf
................\incremental_db\README
................\lfsr.done
................\lfsr.flow.rpt
................\lfsr.map.rpt
................\lfsr.map.smsg
................\lfsr.map.summary
................\lfsr.qpf
................\lfsr.qsf
................\lfsr.qws
................\lfsr.sim.rpt
................\lfsr.v
................\lfsr.v.bak
................\lfsr.vwf
................\rom.v
................\sr.v
................\incremental_db\compiled_partitions
................\db
................\incremental_db
伪随机序列发生器