文件名称:FrChConvLib103
下载
别用迅雷、360浏览器下载。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
介绍说明－－下载内容均来自于网络，请自行研究使用
帧格式和通道格式相互转换的库文件。在NI的网站下载-fr a me Channel Conversion Library，downloaded from NI
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CAN Frame Channel Conversion Library 1.0.3
..........................................\Drivers
..........................................\.......\frchconvlib.dll
..........................................\.......\frchconvlib.out
..........................................\Examples
..........................................\........\900x_Pharlap
..........................................\........\............\Pharlap_Basic
..........................................\........\............\.............\PharlapBasic.aliases
..........................................\........\............\.............\PharlapBasic.lvproj
..........................................\........\............\.............\PharlapBasic.vi
..........................................\........\............\Pharlap_Basic_Input_Output
..........................................\........\............\..........................\FPGA Bitfiles
..........................................\........\............\..........................\.............\PharlapBasicInputO~96_FPGA Target_PharlapBasicInputO~A5.lvbit
..........................................\........\............\..........................\PharlapBasicInputOutput(FPGA).vi
..........................................\........\............\..........................\PharlapBasicInputOutput.aliases
..........................................\........\............\..........................\PharlapBasicInputOutput.lvproj
..........................................\........\............\..........................\PharlapBasicInputOutput.vi
..........................................\........\............\Pharlap_Basic_Input_Output_DMA
..........................................\........\............\..............................\FPGA Bitfiles
..........................................\........\............\..............................\.............\PharlapBasicInputO~1E_FPGA Target_PharlapBasicInputO~2D.lvbit
..........................................\........\............\..............................\PharlapBasicInputOutputDMA(FPGA).vi
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.aliases
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.lvproj
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.vi
..........................................\........\90xx_VxWorks
..........................................\........\............\VxWorks_Basic
..........................................\........\............\.............\VxWorksBasic.aliases
..........................................\........\............\.............\VxWorksBasic.lvproj
..........................................\........\............\.............\VxWorksBasic.vi
..........................................\........\............\VxWorks_Basic_Input_Output
..........................................\........\............\..........................\FPGA Bitfiles
..........................................\........\............\..........................\.............\VxWorksBasicInputO~96_FPGA Target_VxWorksBasicInputO~A5.lvbit
..........................................\........\............\..........................\VxWorksBasicInputOutput(FPGA).vi
..........................................\........\............\..........................\VxWorksBasicInputOutput.aliases
..........................................\........\............\..........................\VxWorksBasicInputOutput.lvproj
..........................................\........\............\..........................\VxWorksBasicInputOutput.vi
..........................................\........\............\VxWorks_Basic_Input_Output_DMA
..........................................\........\............\..............................\FPGA Bitfiles
..........................................\........\............\..............................\.............\VxWorksBasicI
..........................................\Drivers
..........................................\.......\frchconvlib.dll
..........................................\.......\frchconvlib.out
..........................................\Examples
..........................................\........\900x_Pharlap
..........................................\........\............\Pharlap_Basic
..........................................\........\............\.............\PharlapBasic.aliases
..........................................\........\............\.............\PharlapBasic.lvproj
..........................................\........\............\.............\PharlapBasic.vi
..........................................\........\............\Pharlap_Basic_Input_Output
..........................................\........\............\..........................\FPGA Bitfiles
..........................................\........\............\..........................\.............\PharlapBasicInputO~96_FPGA Target_PharlapBasicInputO~A5.lvbit
..........................................\........\............\..........................\PharlapBasicInputOutput(FPGA).vi
..........................................\........\............\..........................\PharlapBasicInputOutput.aliases
..........................................\........\............\..........................\PharlapBasicInputOutput.lvproj
..........................................\........\............\..........................\PharlapBasicInputOutput.vi
..........................................\........\............\Pharlap_Basic_Input_Output_DMA
..........................................\........\............\..............................\FPGA Bitfiles
..........................................\........\............\..............................\.............\PharlapBasicInputO~1E_FPGA Target_PharlapBasicInputO~2D.lvbit
..........................................\........\............\..............................\PharlapBasicInputOutputDMA(FPGA).vi
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.aliases
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.lvproj
..........................................\........\............\..............................\PharlapBasicInputOutputDMA.vi
..........................................\........\90xx_VxWorks
..........................................\........\............\VxWorks_Basic
..........................................\........\............\.............\VxWorksBasic.aliases
..........................................\........\............\.............\VxWorksBasic.lvproj
..........................................\........\............\.............\VxWorksBasic.vi
..........................................\........\............\VxWorks_Basic_Input_Output
..........................................\........\............\..........................\FPGA Bitfiles
..........................................\........\............\..........................\.............\VxWorksBasicInputO~96_FPGA Target_VxWorksBasicInputO~A5.lvbit
..........................................\........\............\..........................\VxWorksBasicInputOutput(FPGA).vi
..........................................\........\............\..........................\VxWorksBasicInputOutput.aliases
..........................................\........\............\..........................\VxWorksBasicInputOutput.lvproj
..........................................\........\............\..........................\VxWorksBasicInputOutput.vi
..........................................\........\............\VxWorks_Basic_Input_Output_DMA
..........................................\........\............\..............................\FPGA Bitfiles
..........................................\........\............\..............................\.............\VxWorksBasicI