文件名称:RISC_Core
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这是用VerilogHDL描述的一个8位精简指令集处理器，包含完整代码，各种文档，以及测试环境。
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下载文件列表
压缩包 : 65520780risc_core.rar 列表 RISC Core\verilog\doc\risc8.pdf RISC Core\verilog\doc\risc8.ps RISC Core\verilog\doc RISC Core\verilog\src\risc8.v RISC Core\verilog\src\risc8_alu.v RISC Core\verilog\src\rbcla_adder.v RISC Core\verilog\src\risc8_control.v RISC Core\verilog\src\risc8_regb_biu.v RISC Core\verilog\src\risc8_constants.v RISC Core\verilog\src\risc8_parameters.v RISC Core\verilog\src RISC Core\verilog\sim\compile RISC Core\verilog\sim\regression RISC Core\verilog\sim\test.v RISC Core\verilog\sim\run_interac RISC Core\verilog\sim\test.mem RISC Core\verilog\sim\risc8.cfg RISC Core\verilog\sim\reg.mem RISC Core\verilog\sim\run_batch RISC Core\verilog\sim\DW01_add.v RISC Core\verilog\sim\asm\and.mem RISC Core\verilog\sim\asm\and.asm RISC Core\verilog\sim\asm\arith.mem RISC Core\verilog\sim\asm\or.asm RISC Core\verilog\sim\asm\arith.asm RISC Core\verilog\sim\asm\jmp.mem RISC Core\verilog\sim\asm\loadstore.asm RISC Core\verilog\sim\asm\logic.mem RISC Core\verilog\sim\asm\or.mem RISC Core\verilog\sim\asm\moves.asm RISC Core\verilog\sim\asm\divide.mem RISC Core\verilog\sim\asm\moves.mem RISC Core\verilog\sim\asm\waitstates.asm RISC Core\verilog\sim\asm\assemble_all RISC Core\verilog\sim\asm\interrupt.asm RISC Core\verilog\sim\asm\interrupt.mem RISC Core\verilog\sim\asm\logic.asm RISC Core\verilog\sim\asm\jmp.asm RISC Core\verilog\sim\asm\flags.asm RISC Core\verilog\sim\asm\divide.asm RISC Core\verilog\sim\asm\loadstore.mem RISC Core\verilog\sim\asm\flags.mem RISC Core\verilog\sim\asm\multiply.asm RISC Core\verilog\sim\asm\multiply.mem RISC Core\verilog\sim\asm\waitstates.mem RISC Core\verilog\sim\asm\staldapshpop.asm RISC Core\verilog\sim\asm\staldapshpop.mem RISC Core\verilog\sim\asm RISC Core\verilog\sim RISC Core\verilog\bin\risc8_asm.pl RISC Core\verilog\bin\example.asm RISC Core\verilog\bin\example.mem RISC Core\verilog\bin\example.hex RISC Core\verilog\bin RISC Core\verilog\syn\risc8_dc_compile.scr RISC Core\verilog\syn RISC Core\verilog RISC Core\example_asm.txt RISC Core\risc8.pdf RISC Core\risc8_asm_pl.txt RISC Core\risc8_tar\risc8_tar RISC Core\risc8_tar RISC Core