文件名称:Example-b3-1

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下载文件列表

压缩包 : 55593378example-b3-1.rar 列表
Example-b3-1\示例说明.doc
Example-b3-1\uart_regs\src\seriesPort.v
Example-b3-1\uart_regs\src\uart_defines.v
Example-b3-1\uart_regs\src\uart_receiver.v
Example-b3-1\uart_regs\src\uart_regs.v
Example-b3-1\uart_regs\src\uart_transmitter.v
Example-b3-1\uart_regs\src\sch\lpm_mux0.bsf
Example-b3-1\uart_regs\src\sch\lpm_mux0.v
Example-b3-1\uart_regs\src\sch\lpm_mux0_bb.v
Example-b3-1\uart_regs\src\sch\sch_exam.bdf
Example-b3-1\uart_regs\src\sch\db
Example-b3-1\uart_regs\src\sch
Example-b3-1\uart_regs\src
Example-b3-1\uart_regs\sim\parsim
Example-b3-1\uart_regs\sim\funcsim\uart_regs_h.vwf
Example-b3-1\uart_regs\sim\funcsim\uart_regs_pre.vwf
Example-b3-1\uart_regs\sim\funcsim
Example-b3-1\uart_regs\sim
Example-b3-1\uart_regs\dev\chip_editor.acv
Example-b3-1\uart_regs\dev\cmp_state.ini
Example-b3-1\uart_regs\dev\sim.cfg
Example-b3-1\uart_regs\dev\uart_regs.asm.rpt
Example-b3-1\uart_regs\dev\uart_regs.done
Example-b3-1\uart_regs\dev\uart_regs.fit.eqn
Example-b3-1\uart_regs\dev\uart_regs.fit.rpt
Example-b3-1\uart_regs\dev\uart_regs.fld
Example-b3-1\uart_regs\dev\uart_regs.flow.rpt
Example-b3-1\uart_regs\dev\uart_regs.map.eqn
Example-b3-1\uart_regs\dev\uart_regs.map.rpt
Example-b3-1\uart_regs\dev\uart_regs.pin
Example-b3-1\uart_regs\dev\uart_regs.pof
Example-b3-1\uart_regs\dev\uart_regs.qpf
Example-b3-1\uart_regs\dev\uart_regs.qsf
Example-b3-1\uart_regs\dev\uart_regs.qws
Example-b3-1\uart_regs\dev\uart_regs.rbf
Example-b3-1\uart_regs\dev\uart_regs.sim.rpt
Example-b3-1\uart_regs\dev\uart_regs.sof
Example-b3-1\uart_regs\dev\uart_regs.tan.rpt
Example-b3-1\uart_regs\dev\uart_regs.tan.summary
Example-b3-1\uart_regs\dev\db\a_dpfifo_4nl.tdf
Example-b3-1\uart_regs\dev\db\a_dpfifo_rll.tdf
Example-b3-1\uart_regs\dev\db\a_fefifo_qve.tdf
Example-b3-1\uart_regs\dev\db\add_sub_1jh.tdf
Example-b3-1\uart_regs\dev\db\add_sub_dhh.tdf
Example-b3-1\uart_regs\dev\db\add_sub_ehh.tdf
Example-b3-1\uart_regs\dev\db\add_sub_fhh.tdf
Example-b3-1\uart_regs\dev\db\add_sub_ihh.tdf
Example-b3-1\uart_regs\dev\db\add_sub_rih.tdf
Example-b3-1\uart_regs\dev\db\altsyncram_apb1.tdf
Example-b3-1\uart_regs\dev\db\altsyncram_mmb1.tdf
Example-b3-1\uart_regs\dev\db\dpram_81k.tdf
Example-b3-1\uart_regs\dev\db\dpram_h2k.tdf
Example-b3-1\uart_regs\dev\db\scfifo_eaq.tdf
Example-b3-1\uart_regs\dev\db\scfifo_nbq.tdf
Example-b3-1\uart_regs\dev\db\uart_regs(0).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(0).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(1).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(1).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(10).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(10).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(11).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(11).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(12).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(12).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(13).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(13).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(14).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(14).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(15).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(15).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(16).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(16).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(17).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(17).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(18).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(18).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(19).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(19).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(2).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(2).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(20).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(20).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(21).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(21).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(3).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(3).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(4).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(4).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(5).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(5).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(6).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(6).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(7).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(7).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(8).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(8).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs(9).cnf.cdb
Example-b3-1\uart_regs\dev\db\uart_regs(9).cnf.hdb
Example-b3-1\uart_regs\dev\db\uart_regs-sim.vwf
Example-b3-1\uart_regs\dev\db\uart_regs.asm.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.cmp.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.cmp.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.cmp.rdb
Example-b3-1\uart_regs\dev\db\uart_regs.csf.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.db_info
Example-b3-1\uart_regs\dev\db\uart_regs.fit.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.fld
Example-b3-1\uart_regs\dev\db\uart_regs.fnsim.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.fnsim.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.hif
Example-b3-1\uart_regs\dev\db\uart_regs.icc
Example-b3-1\uart_regs\dev\db\uart_regs.map.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.map.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.map.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.pre_map.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.project.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.rpp.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.rtlv.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.rtlv_rvd.rvd
Example-b3-1\uart_regs\dev\db\uart_regs.rtlv_sg.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.rtlv_sg_swap.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.sgdiff.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.sgdiff.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.signalprobe.cdb
Example-b3-1\uart_regs\dev\db\uart_regs.sim.hdb
Example-b3-1\uart_regs\dev\db\uart_regs.sim.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.sim.rdb
Example-b3-1\uart_regs\dev\db\uart_regs.tan.qmsg
Example-b3-1\uart_regs\dev\db\uart_regs.uart_regs.sld_design_entry.sci
Example-b3-1\uart_regs\dev\db\uart_regs_cmp.qrpt
Example-b3-1\uart_regs\dev\db\uart_regs_hier_info
Example-b3-1\uart_regs\dev\db\uart_regs_sim.qrpt
Example-b3-1\uart_regs\dev\db\uart_regs_syn_hier_info
Example-b3-1\uart_regs\dev\db
Example-b3-1\uart_regs\dev
Example-b3-1\uart_regs\core\myfifo_10.v
Example-b3-1\uart_regs\core\myfifo_10_bb.v
Example-b3-1\uart_regs\core\myfifo_10_wave0.jpg
Example-b3-1\uart_regs\core\myfifo_10_waveforms.html
Example-b3-1\uart_regs\core\myfifo_8.v
Example-b3-1\uart_regs\core\myfifo_8_bb.v
Example-b3-1\uart_regs\core\myfifo_8_wave0.jpg
Example-b3-1\uart_regs\core\myfifo_8_waveforms.html
Example-b3-1\uart_regs\core\db
Example-b3-1\uart_regs\core
Example-b3-1\uart_regs
Example-b3-1

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