文件名称:an499_design_example
介绍说明－－下载内容均来自于网络，请自行研究使用
cpld 控制 8-32M sdram 控制器 maxII epm570实现。
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 15883870an499_design_example.rar 列表 an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\code\addr_gen.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\code\mobile_sdram.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\code\upcount_2.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\code\upcount_4.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\code an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\addr_gen.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\mobile_sdram.cr.mti an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\mobile_sdram.mpf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\mobile_sdram.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\test_mob_sdram.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\upcount_2.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\upcount_4.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\vsim.wlf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.bmp an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.do an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\addr_gen\verilog.psm an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\addr_gen\_primary.dat an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\addr_gen\_primary.vhd an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\addr_gen an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\mobile_sdram\verilog.psm an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\mobile_sdram\_primary.dat an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\mobile_sdram\_primary.vhd an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\mobile_sdram an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\test_mob_sdram\verilog.psm an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\test_mob_sdram\_primary.dat an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\test_mob_sdram\_primary.vhd an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\test_mob_sdram an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_2\verilog.psm an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_2\_primary.dat an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_2\_primary.vhd an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_2 an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_4\verilog.psm an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_4\_primary.dat an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_4\_primary.vhd an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\upcount_4 an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work\_info an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim\work an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\modelsim an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\addr_gen.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(0).cnf.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(0).cnf.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(1).cnf.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(1).cnf.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(2).cnf.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(2).cnf.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(3).cnf.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.(3).cnf.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.asm.qmsg an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.asm_labs.ddb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cbx.xml an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.kpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.logdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.rdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp.tdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.cmp0.ddb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.dbp an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.db_info an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.eco.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.fit.qmsg an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.hier_info an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.hif an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.map.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.map.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.map.logdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.map.qmsg an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.pre_map.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.pre_map.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.psp an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.rtlv.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.rtlv_sg.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.rtlv_sg_swap.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.sgdiff.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.sgdiff.hdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.signalprobe.cdb an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.sld_design_entry.sci an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.sld_design_entry_dsc.sci an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.syn_hier_info an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db\mobile_sdram.tan.qmsg an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\db an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.asm.rpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.done an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.dpf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.fit.rpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.fit.smsg an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.fit.summary an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.flow.rpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.map.rpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.map.summary an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.pin an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.pof an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.qpf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.qsf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.qws an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.tan.rpt an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.tan.summary an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\mobile_sdram_assignment_defaults.qdf an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\upcount_2.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus\upcount_4.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\quartus an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\testbench\test_mob_sdram.v an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example\testbench an499_design_example\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example an499_design_example