文件名称:cmos_fifo_usb
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cmos数据到fifo再到usb的fifo部分程序(68013a)-cmos data to fifo the fifo to the usb part of the procedures (68013a)
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CMOS
68013
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cmos
usb
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i2c
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usb
cmos
68013A
Came
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cmos_fifo_usb
rar
68013
vhdl
CMOS
68013
CMOS
cmos
usb
CMOS
VHDL
i2c
FPGA
usb
cmos
68013A
Came
VHDL
USB
cmos_fifo_usb
rar
68013
vhdl
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下载文件列表
cmos_fifo_usb
.............\cmos_fifo_usb.prj
.............\component
.............\constraint
.............\coreconsole
.............\designer
.............\........\impl1
.............\........\.....\simulation
.............\hdl
.............\...\cmos_fifo.v
.............\phy_synthesis
.............\simulation
.............\smartgen
.............\........\smartgen.aws
.............\........\soft_fifo1280x8
.............\........\...............\soft_fifo1280x8.cxf
.............\........\...............\soft_fifo1280x8.gen
.............\........\...............\soft_fifo1280x8.log
.............\........\...............\soft_fifo1280x8.v
.............\........\soft_fifo1280x8_work.ixf
.............\........\two_port1280x8
.............\........\..............\two_port1280x8.cxf
.............\........\..............\two_port1280x8.gen
.............\........\..............\two_port1280x8.log
.............\........\..............\two_port1280x8.shx
.............\........\..............\two_port1280x8.v
.............\........\..............\two_port1280x8_R0C0.mem
.............\........\..............\two_port1280x8_R1C0.mem
.............\........\..............\two_port1280x8_R2C0.mem
.............\........\two_port1280x8_work.ixf
.............\........\usb_fifo32x16
.............\........\.............\usb_fifo32x16.cxf
.............\........\.............\usb_fifo32x16.gen
.............\........\.............\usb_fifo32x16.log
.............\........\.............\usb_fifo32x16.shx
.............\........\.............\usb_fifo32x16.v
.............\........\.............\usb_fifo32x16_R0C0.mem
.............\........\usb_fifo32x16_work.ixf
.............\stimulus
.............\........\cmos_fifo_tb.v
.............\........\cmos_fifo_tb.v.bak
.............\synthesis
.............\.........\backup
.............\.........\......\cmos_fifo_usb.srr
.............\.........\cmos_fifo_usb.areasrr
.............\.........\cmos_fifo_usb.edn
.............\.........\cmos_fifo_usb.map
.............\.........\cmos_fifo_usb.sdf
.............\.........\cmos_fifo_usb.srd
.............\.........\cmos_fifo_usb.srm
.............\.........\cmos_fifo_usb.srr
.............\.........\cmos_fifo_usb.srs
.............\.........\cmos_fifo_usb.tlg
.............\.........\cmos_fifo_usb_sdc.sdc
.............\.........\cmos_fifo_usb_syn.prj
.............\.........\run_options.txt
.............\.........\stdout.log
.............\.........\syntmp
.............\.........\......\cmos_fifo_usb.msg
.............\.........\......\cmos_fifo_usb.plg
.............\viewdraw
.............\........\sch
.............\........\sym
.............\........\vf
.............\........\..\project.lst
.............\........\viewdraw.ini
.............\........\wir
.............\cmos_fifo_usb.prj
.............\component
.............\constraint
.............\coreconsole
.............\designer
.............\........\impl1
.............\........\.....\simulation
.............\hdl
.............\...\cmos_fifo.v
.............\phy_synthesis
.............\simulation
.............\smartgen
.............\........\smartgen.aws
.............\........\soft_fifo1280x8
.............\........\...............\soft_fifo1280x8.cxf
.............\........\...............\soft_fifo1280x8.gen
.............\........\...............\soft_fifo1280x8.log
.............\........\...............\soft_fifo1280x8.v
.............\........\soft_fifo1280x8_work.ixf
.............\........\two_port1280x8
.............\........\..............\two_port1280x8.cxf
.............\........\..............\two_port1280x8.gen
.............\........\..............\two_port1280x8.log
.............\........\..............\two_port1280x8.shx
.............\........\..............\two_port1280x8.v
.............\........\..............\two_port1280x8_R0C0.mem
.............\........\..............\two_port1280x8_R1C0.mem
.............\........\..............\two_port1280x8_R2C0.mem
.............\........\two_port1280x8_work.ixf
.............\........\usb_fifo32x16
.............\........\.............\usb_fifo32x16.cxf
.............\........\.............\usb_fifo32x16.gen
.............\........\.............\usb_fifo32x16.log
.............\........\.............\usb_fifo32x16.shx
.............\........\.............\usb_fifo32x16.v
.............\........\.............\usb_fifo32x16_R0C0.mem
.............\........\usb_fifo32x16_work.ixf
.............\stimulus
.............\........\cmos_fifo_tb.v
.............\........\cmos_fifo_tb.v.bak
.............\synthesis
.............\.........\backup
.............\.........\......\cmos_fifo_usb.srr
.............\.........\cmos_fifo_usb.areasrr
.............\.........\cmos_fifo_usb.edn
.............\.........\cmos_fifo_usb.map
.............\.........\cmos_fifo_usb.sdf
.............\.........\cmos_fifo_usb.srd
.............\.........\cmos_fifo_usb.srm
.............\.........\cmos_fifo_usb.srr
.............\.........\cmos_fifo_usb.srs
.............\.........\cmos_fifo_usb.tlg
.............\.........\cmos_fifo_usb_sdc.sdc
.............\.........\cmos_fifo_usb_syn.prj
.............\.........\run_options.txt
.............\.........\stdout.log
.............\.........\syntmp
.............\.........\......\cmos_fifo_usb.msg
.............\.........\......\cmos_fifo_usb.plg
.............\viewdraw
.............\........\sch
.............\........\sym
.............\........\vf
.............\........\..\project.lst
.............\........\viewdraw.ini
.............\........\wir