lab4

....\rejestry

....\........\isim

....\........\....\file graph

....\........\....\temp

....\........\....\....\hdllib.ref

....\........\....\....\hdpdeps.ref

....\........\....\....\sub00

....\........\....\....\.....\vhpl00.vho

....\........\....\....\.....\vhpl01.vho

....\........\....\....\.....\vhpl02.vho

....\........\....\....\.....\vhpl03.vho

....\........\....\....\.....\vhpl04.vho

....\........\....\....\.....\vhpl05.vho

....\........\....\....\.....\vhpl06.vho

....\........\....\....\.....\vhpl07.vho

....\........\....\work

....\........\....\....\hdllib.ref

....\........\....\....\hdpdeps.ref

....\........\....\....\parallel_8bit

....\........\....\....\.............\behavioral.h

....\........\....\....\.............\mingw

....\........\....\....\.............\.....\behavioral.obj

....\........\....\....\przerzutnikd

....\........\....\....\............\behavioral.h

....\........\....\....\............\mingw

....\........\....\....\............\.....\behavioral.obj

....\........\....\....\sub00

....\........\....\....\.....\vhpl00.vho

....\........\....\....\.....\vhpl01.vho

....\........\....\....\.....\vhpl02.vho

....\........\....\....\.....\vhpl03.vho

....\........\....\....\.....\vhpl04.vho

....\........\....\....\.....\vhpl05.vho

....\........\....\....\.....\vhpl06.vho

....\........\....\....\.....\vhpl07.vho

....\........\....\....\tb_parallel_8bit_vhd

....\........\....\....\....................\behavior.h

....\........\....\....\....................\mingw

....\........\....\....\....................\.....\behavior.obj

....\........\....\....\....................\xsimbehavior.cpp

....\........\....\....\tb_przerzutnikd_vhd

....\........\....\....\...................\behavior.h

....\........\....\....\...................\mingw

....\........\....\....\...................\.....\behavior.obj

....\........\....\....\...................\xsimbehavior.cpp

....\........\isim.cmd

....\........\isim.hdlsourcefiles

....\........\isim.tmp_save

....\........\.............\_1

....\........\parallel_8bit.vhd

....\........\parallel_8bit_stx.prj

....\........\pepExtractor.prj

....\........\przerzutnikD.vhd

....\........\przerzutnikD_stx.prj

....\........\rejestry.ise

....\........\rejestry.ise_ISE_Backup

....\........\rejestry.restore

....\........\simulate_dofile.log_back

....\........\TB_parallel_8bit.vhd

....\........\TB_parallel_8bit_vhd_beh.prj

....\........\TB_parallel_8bit_vhd_isim_beh.exe

....\........\TB_parallel_8bit_vhd_stx.prj

....\........\TB_przerzutnikD.vhd

....\........\tb_przerzutnikd_vhd_isim_beh.wfs

....\........\TB_przerzutnikD_vhd_stx.prj

....\........\xilinxsim.ini

....\........\xst

....\........\...\work

....\........\...\....\hdllib.ref

....\........\...\....\hdpdeps.ref

....\........\...\....\sub00

....\........\...\....\.....\vhpl00.vho

....\........\...\....\.....\vhpl01.vho

....\........\...\....\.....\vhpl02.vho

....\........\...\....\.....\vhpl03.vho

....\........\_xmsgs

....\........\......\fuse.xmsgs

....\........\......\vhpcomp.xmsgs

....\........\__ISE_repository_rejestry.ise_.lock

lab_1

.....\bramka_stx.prj

.....\bramka_tb_beh.prj

.....\bramka_tb_isim_beh.exe

.....\bramka_tb_isim_beh.wfs

.....\bramka_tb_stx.prj

.....\first.vhd

.....\first_bench.vhd

.....\isim

.....\....\file graph

.....\....\temp

.....\....\....\hdllib.ref

.....\....\....\hdpdeps.ref

.....\....\....\sub00

.....\....\....\.....\vhpl00.vho

.....\....\....\.....\vhpl01.vho

.....\....\....\.....\vhpl02.vho

.....\....\....\.....\vhpl03.vho

.....\....\work

.....\....\....\bramka