文件名称:lab2

  • 所属分类:
  • 其他嵌入式/单片机内容
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 5.47mb
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  • 0次
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基于Xilinx-XUPV2P开发平台的嵌入式系统实验例程:实验2为硬件设计添加IP-Xilinx-XUPV2P-based development platform for embedded systems experimental routines: Experiment 2 for the hardware design to add IP
相关搜索: xupv2p
lab2

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lab2

....\automake.log

....\bitinit.log

....\blkdiagram

....\..........\MdtXdsSVG_Render.css

....\..........\svg10.dtd

....\..........\system.html



....\..........\system.svg

....\data

....\....\system.ucf

....\....\system0.ucf

....\....\新建 文本文档.txt

....\etc

....\...\bitgen.ut

....\...\download.cmd

....\...\fast_runtime.opt

....\hdl

....\...\dcm_0_wrapper.vhd

....\...\dip_push_wrapper.vhd

....\...\elaborate

....\...\.........\plb_bram_if_cntlr_1_bram_elaborate_v1_00_a

....\...\.........\..........................................\hdl

....\...\.........\..........................................\...\verilog

....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_1_bram_elaborate.v

....\...\.........\..........................................\...\vhdl

....\...\.........\..........................................\...\....\plb_bram_if_cntlr_1_bram_elaborate.vhd

....\...\.........\plb_bram_if_cntlr_2_bram_elaborate_v1_00_a

....\...\.........\..........................................\hdl

....\...\.........\..........................................\...\verilog

....\...\.........\..........................................\...\.......\plb_bram_if_cntlr_2_bram_elaborate.v

....\...\.........\..........................................\...\vhdl

....\...\.........\..........................................\...\....\plb_bram_if_cntlr_2_bram_elaborate.vhd

....\...\jtagppc_0_wrapper.vhd

....\...\opb_wrapper.vhd

....\...\plb2opb_wrapper.vhd

....\...\plb_bram_if_cntlr_1_bram_wrapper.vhd

....\...\plb_bram_if_cntlr_1_wrapper.vhd

....\...\plb_bram_if_cntlr_2_bram_wrapper.vhd

....\...\plb_bram_if_cntlr_2_wrapper.vhd

....\...\plb_wrapper.vhd

....\...\ppc405_0_wrapper.vhd

....\...\ppc405_1_wrapper.vhd

....\...\reset_block_wrapper.vhd

....\...\rs232_uart_1_wrapper.vhd

....\...\system.vhd

....\implementation

....\..............\bitgen.ut

....\..............\cache

....\..............\.....\cache.cat

....\..............\.....\dcm_0_wrapper.ngc

....\..............\.....\dip_push_wrapper.ngc

....\..............\.....\jtagppc_0_wrapper.ngc

....\..............\.....\opb_wrapper.ngc

....\..............\.....\plb2opb_wrapper.ngc

....\..............\.....\plb_bram_if_cntlr_1_bram_wrapper.ngc

....\..............\.....\plb_bram_if_cntlr_1_wrapper.ngc

....\..............\.....\plb_bram_if_cntlr_2_bram_wrapper.ngc

....\..............\.....\plb_bram_if_cntlr_2_wrapper.ngc

....\..............\.....\plb_wrapper.ngc

....\..............\.....\ppc405_0_wrapper.ngc

....\..............\.....\ppc405_1_wrapper.ngc

....\..............\.....\reset_block_wrapper.ngc

....\..............\.....\rs232_uart_1_wrapper.ngc

....\..............\dcm_0_wrapper

....\..............\.............\dcm_0_wrapper.ngc

....\..............\dcm_0_wrapper.ngc

....\..............\dip_push_wrapper

....\..............\................\dip_push_wrapper.ngc

....\..............\dip_push_wrapper.ngc

....\..............\download.bit

....\..............\fpga.flw

....\..............\jtagppc_0_wrapper

....\..............\.................\jtagppc_0_wrapper.ngc

....\..............\jtagppc_0_wrapper.ngc

....\..............\netlist.lst

....\..............\opb_wrapper

....\..............\...........\opb_wrapper.ngc

....\..............\opb_wrapper.ngc

....\..............\plb2opb_wrapper

....\..............\...............\plb2opb_wrapper.ngc

....\..............\plb2opb_wrapper.ngc

....\..............\plb_bram_if_cntlr_1_bram_wrapper

....\..............\................................\plb_bram_if_cntlr_1_bram_wrapper.ngc

....\..............\plb_bram_if_cntlr_1_bram_wrapper.ngc

....\..............\plb_bram_if_cntlr_1_wrapper

....\..............\...........................\plb_bram_if_cntlr_1_wrapper.ngc

....\..............\plb_bram_if_cntlr_1_wrapper.ngc

....\..............\plb_bram_if_cntlr_2_bram_wrapper

....\..............\................................\plb_bram_if_cntlr_2_bram_wrapper.ngc

....\..............\plb_bram_if_cntlr_2_bram_wrapper.ngc

....\..............\plb_bram_if_cntlr_2_wrapper

....\..............\...........................\plb_bram_if_cntlr_2_wrap

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