文件名称:alu_vlog
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学习使用HDL Bencher生成测试积累，并直接调用ModelSim进行仿真的方法.-learning HDL Bencher generate test accumulation, and called directly ModelSim simulation methods.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 97288406alu_vlog.rar 列表 alu_vlog\ALU.V alu_vlog\HDL_DEMO.V alu_vlog\__projnav.log alu_vlog\alu.edn alu_vlog\alu.fse alu_vlog\alu.ldo alu_vlog\alu.log alu_vlog\alu.ncf alu_vlog\alu.plg alu_vlog\alu.prj alu_vlog\alu.sdc alu_vlog\alu.spl alu_vlog\alu.srd alu_vlog\alu.srm alu_vlog\alu.srr alu_vlog\alu.srs alu_vlog\alu.sym alu_vlog\alu.tfi alu_vlog\alu.tlg alu_vlog\alu_compile.tcl alu_vlog\alu_map.tcl alu_vlog\alu_tst_wave.ant alu_vlog\alu_tst_wave.fdo alu_vlog\alu_tst_wave.tbw alu_vlog\alu_tst_wave.tfw alu_vlog\alu_tst_wave.udo alu_vlog\alu_vlog.ptf alu_vlog\alu_vlog_synpro.prd alu_vlog\alu_vlog_synpro.prj alu_vlog\automake.log alu_vlog\results.txt alu_vlog\stdout.log alu_vlog\transcript alu_vlog\userlang.tpl alu_vlog\vsim.wlf alu_vlog\alu_vlog_ise5_bak.zip alu_vlog\alu_vlog.npl alu_vlog\coregen.log alu_vlog\coregen.prj alu_vlog\alu_vlog.dhp alu_vlog\__projnav\ALU_jhdparse_tcl.rsp alu_vlog\__projnav\__synProj.rsp alu_vlog\__projnav\alu.ise_created alu_vlog\__projnav\alu_tst_wave_createfdo.rsp alu_vlog\__projnav\alu_vlog.gfl alu_vlog\__projnav\jhdparse.log alu_vlog\__projnav\vTOldo_tcl.rsp alu_vlog\__projnav\coregen.rsp alu_vlog\__projnav alu_vlog\alu_vlog_syn1\ALU.edf alu_vlog\alu_vlog_syn1\ALU.fse alu_vlog\alu_vlog_syn1\ALU.ncf alu_vlog\alu_vlog_syn1\ALU.plg alu_vlog\alu_vlog_syn1\ALU.srd alu_vlog\alu_vlog_syn1\ALU.srm alu_vlog\alu_vlog_syn1\ALU.srr alu_vlog\alu_vlog_syn1\ALU.srs alu_vlog\alu_vlog_syn1\ALU.tlg alu_vlog\alu_vlog_syn1\syntax.log alu_vlog\alu_vlog_syn1 alu_vlog\work\_info alu_vlog\work\alu_tst_wave\_primary.vhd alu_vlog\work\alu_tst_wave\verilog.asm alu_vlog\work\alu_tst_wave\_primary.dat alu_vlog\work\alu_tst_wave alu_vlog\work\alu\_primary.dat alu_vlog\work\alu\_primary.vhd alu_vlog\work\alu\verilog.asm alu_vlog\work\alu alu_vlog\work\glbl\_primary.dat alu_vlog\work\glbl\_primary.vhd alu_vlog\work\glbl\verilog.asm alu_vlog\work\glbl alu_vlog\work\hdl_demo\_primary.dat alu_vlog\work\hdl_demo\_primary.vhd alu_vlog\work\hdl_demo\verilog.asm alu_vlog\work\hdl_demo alu_vlog\work\testbench\_primary.dat alu_vlog\work\testbench\_primary.vhd alu_vlog\work\testbench\verilog.asm alu_vlog\work\testbench alu_vlog\work alu_vlog