project_18_sobel

................\ALINX3402.tcl

................\ALINX3402_EP4CE15F23C8 .tcl

................\ALINX3402_EP4CE30F23C6.tcl

................\ddr2_phy_autodetectedpins.tcl

................\ddr2_phy_summary.csv

................\ip_core

................\.......\ddr

................\.......\...\altmemphy-library

................\.......\...\.................\auk_ddr_hp_controller.ocp

................\.......\...\alt_mem_ddrx_addr_cmd.v

................\.......\...\alt_mem_ddrx_addr_cmd_wrap.v

................\.......\...\alt_mem_ddrx_arbiter.v

................\.......\...\alt_mem_ddrx_buffer.v

................\.......\...\alt_mem_ddrx_buffer_manager.v

................\.......\...\alt_mem_ddrx_burst_gen.v

................\.......\...\alt_mem_ddrx_burst_tracking.v

................\.......\...\alt_mem_ddrx_cmd_gen.v

................\.......\...\alt_mem_ddrx_controller.v

................\.......\...\alt_mem_ddrx_controller_st_top.v

................\.......\...\alt_mem_ddrx_csr.v

................\.......\...\alt_mem_ddrx_dataid_manager.v

................\.......\...\alt_mem_ddrx_ddr2_odt_gen.v

................\.......\...\alt_mem_ddrx_ddr3_odt_gen.v

................\.......\...\alt_mem_ddrx_define.iv

................\.......\...\alt_mem_ddrx_ecc_decoder.v

................\.......\...\alt_mem_ddrx_ecc_decoder_32_syn.v

................\.......\...\alt_mem_ddrx_ecc_decoder_64_syn.v

................\.......\...\alt_mem_ddrx_ecc_encoder.v

................\.......\...\alt_mem_ddrx_ecc_encoder_32_syn.v

................\.......\...\alt_mem_ddrx_ecc_encoder_64_syn.v

................\.......\...\alt_mem_ddrx_ecc_encoder_decoder_wrapper.v

................\.......\...\alt_mem_ddrx_fifo.v

................\.......\...\alt_mem_ddrx_input_if.v

................\.......\...\alt_mem_ddrx_list.v

................\.......\...\alt_mem_ddrx_lpddr2_addr_cmd.v

................\.......\...\alt_mem_ddrx_mm_st_converter.v

................\.......\...\alt_mem_ddrx_odt_gen.v

................\.......\...\alt_mem_ddrx_rank_timer.v

................\.......\...\alt_mem_ddrx_rdata_path.v

................\.......\...\alt_mem_ddrx_rdwr_data_tmg.v

................\.......\...\alt_mem_ddrx_sideband.v

................\.......\...\alt_mem_ddrx_tbp.v

................\.......\...\alt_mem_ddrx_timing_param.v

................\.......\...\alt_mem_ddrx_wdata_path.v

................\.......\...\alt_mem_phy_defines.v

................\.......\...\ddr2.bsf

................\.......\...\ddr2.html

................\.......\...\ddr2.qip

................\.......\...\ddr2.v

................\.......\...\ddr2_advisor.ipa

................\.......\...\ddr2_alt_mem_ddrx_controller_top.v

................\.......\...\ddr2_bb.v

................\.......\...\ddr2_controller_phy.v

................\.......\...\ddr2_example_driver.v

................\.......\...\ddr2_example_top.sdc

................\.......\...\ddr2_example_top.v

................\.......\...\ddr2_ex_lfsr8.v

................\.......\...\ddr2_high_performance_controller-library

................\.......\...\........................................\auk_ddr_hp_controller.ocp

................\.......\...\ddr2_phy.bsf

................\.......\...\ddr2_phy.html

................\.......\...\ddr2_phy.qip

................\.......\...\ddr2_phy.v

................\.......\...\ddr2_phy_alt_mem_phy.v

................\.......\...\ddr2_phy_alt_mem_phy_pll.qip

................\.......\...\ddr2_phy_alt_mem_phy_pll.v

................\.......\...\ddr2_phy_alt_mem_phy_pll_bb.v

................\.......\...\ddr2_phy_alt_mem_phy_seq.vhd

................\.......\...\ddr2_phy_alt_mem_phy_seq_wrapper.v

................\.......\...\ddr2_phy_autodetectedpins.tcl

................\.......\...\ddr2_phy_bb.v

................\.......\...\ddr2_phy_ddr_pins.tcl

................\.......\...\ddr2_phy_ddr_timing.sdc

................\.......\...\ddr2_phy_ddr_timing.tcl

................\.......\...\ddr2_phy_report_timing.tcl

................\.......\...\ddr2_phy_report_timing_core.tcl

................\.......\...\ddr2_pin_assignments.tcl

................\.....