该信号发生器模块存储库包含仲代，斜坡生成和

梯形生成模块。该信号发生器模块使用的是实施

模运算计数器（即任何溢出被忽略，仅剩余部分保留）到

精确地控制频率。所产生的信号的频率是倒数的

花费的时间为模数计数器的连续溢流，这又与相称

加到计数器的步长值。从而通过改变步长值，可以精确地控制

的频率。-The signal generator module repository contains SIN generation, ramp generation and

trapezoidal generation modules. The signal generator modules are implemented using

modulo arithmetic counter (i.e. Any overflow is ignored and only the remainder is kept) to

precisely control the frequency. The frequency of the generated signal is reciprocal of the

time it takes for successive overflow of modulo counter, which in turn commensurate with the

step value added to the counter. Thus by changing the step value, one can precisely control

the frequency.