文件名称:Example-2-4

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  • 2008-10-13
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这些是verilog编程实例4,仅供参考-These are four examples of Verilog Programming for reference
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : 19854823example-2-4.rar 列表
Example-2-4\示例说明.doc
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\DPRAM_core_Demo.npl
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\UCF_Demo.cel
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\UCF_Demo.ucf
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\UCF_Demo.ucf.untf
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\automake.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\bitgen.ut
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\core.tpl
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\coregen.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.asy
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.edn
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.jhd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.ngo
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.sym
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.v
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.veo
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.vhd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.vho
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.xco
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core.xcp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\dpram_core_flist.txt
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_fixture.jhd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_fixture.tf
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_wave.ant
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_wave.jhd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_wave.tbw
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\test_wave.tfw
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ana
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.bgn
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.bit
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.bld
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.cmd_log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.dly
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.drc
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.fse
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.jhd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.mrp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.nc1
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ncd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ncf
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ngc
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ngd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ngm
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ngr
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.pad
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.par
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.pcf
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.plg
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.prj
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.sdc
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.sprj
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.srd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.stx
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.syr
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.tlg
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.twr
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.twx
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.ut
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.v
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top.xpi
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top_map.ncd
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top_map.ngm
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\top_ngdbuild.nav
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\userlang.tpl
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\_tmp_\coretmpdir
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\_tmp_
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\_ngo\dpram_core.ngo
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\_ngo\netlist.lst
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\_ngo
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\__top.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\bitgen.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\dpram_core_demo.gfl
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\dpram_core_demo_flowplus.gfl
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\ednTOngd_tcl.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\hb_cmds
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\map.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\nc1TOncd_tcl.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\par.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\parentAssignPackagePinsApp_tcl.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\posttrc.log
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\runXst_tcl.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\top._prj
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\top._sprj
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\top.xst
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav\top_ncdTOut_tcl.rsp
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo\__projnav
Example-2-4\CoreGenDemo_DPRAM\DPRAM_core_Demo
Example-2-4\CoreGenDemo_DPRAM
Example-2-4

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