收藏

文件名称:SPI转I2C

  • 所属分类：
  • 其他小程序
  • 资源属性：
  • [PDF]
  • 上传时间：
  • 2017-07-07
  • 文件大小：
  • 923kb
  • 下载次数：
  • 0次
  • 提 供 者：
  • 昊天***
  • 相关连接：
  • 无
  • 下载说明：
  • 别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

SPI协议至IIC协议转换的verilog代码(SPI protocol to IIC protocol conversion Verilog code)
相关搜索： verilog
SPI
2
IIC

(系统自动生成,下载前可以参看下载内容)

下载文件列表

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\an486_ch.pdf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\code\SPI_to_I2C.v

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\SPI_to_I2C.cr.mti

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\SPI_to_I2C.mpf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\SPI_to_I2C.v

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\SPI_to_I2C_test.v

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\SPI_to_I2C_test.v.bak

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\transcript

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\vsim.wlf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.bmp

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.do

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@i2@c_master\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@i2@c_master\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@i2@c_master\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_slave\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_slave\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_slave\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c_test\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c_test\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c_test\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\divider\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\divider\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\divider\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\internal_oss_altufm_osc_7p3\verilog.psm

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\internal_oss_altufm_osc_7p3\_primary.dat

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\internal_oss_altufm_osc_7p3\_primary.vhd

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\_info

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.asm.qmsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.asm_labs.ddb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cbx.xml

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp.hdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp.logdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp.rdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp.tdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.cmp0.ddb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.dbp

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.db_info

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.eco.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.fit.qmsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.hier_info

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.hif

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.map.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.map.hdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.map.logdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.map.qmsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.pre_map.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.pre_map.hdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.psp

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.pss

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.rtlv.hdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.rtlv_sg.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.rtlv_sg_swap.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.sgdiff.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.sgdiff.hdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.signalprobe.cdb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.sld_design_entry.sci

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.sld_design_entry_dsc.sci

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.syn_hier_info

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.tan.qmsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db\SPI_to_I2C.tis_db_list.ddb

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.asm.rpt

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.done

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.dpf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.fit.rpt

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.fit.smsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.fit.summary

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.flow.rpt

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.map.rpt

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.map.smsg

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.map.summary

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.pin

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.pof

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.qarlog

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.qpf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.qsf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.qws

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.tan.rpt

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.tan.summary

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C.v

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\SPI_to_I2C_assignment_defaults.qdf

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\testbench\SPI_to_I2C_test.v

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@i2@c_master

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_slave

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\@s@p@i_to_@i2@c_test

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\divider

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work\internal_oss_altufm_osc_7p3

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim\work

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus\db

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\code

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\modelsim

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\quartus

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example\testbench

AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台，提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 请直接用浏览器下载本站内容，不要使用迅雷之类的下载软件，用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*主　　题：
*内　　容：
*验 证 码：

源码中国 www.ymcn.org