文件名称:tb
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用verilog语言实现FPGA控制测频(The FPGA control measurement was realized with verilog language)
相关搜索： 测频的verilg程序
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下载文件列表
tb\db\altsyncram_95b1.tdf
tb\db\a_dpfifo_5h31.tdf
tb\db\cmpr_b78.tdf
tb\db\cntr_537.tdf
tb\db\cntr_o2b.tdf
tb\db\cntr_p2b.tdf
tb\db\prev_cmp_tb.qmsg
tb\db\scfifo_ua31.tdf
tb\db\tb.cbx.xml
tb\db\tb.cmp.bpm
tb\db\tb.cmp.cdb
tb\db\tb.cmp.hdb
tb\db\tb.cmp.logdb
tb\db\tb.cmp.rdb
tb\db\tb.cmp_merge.kpt
tb\db\tb.db_info
tb\db\tb.fit.qmsg
tb\db\tb.hier_info
tb\db\tb.hif
tb\db\tb.lpc.html
tb\db\tb.lpc.rdb
tb\db\tb.lpc.txt
tb\db\tb.map.ammdb
tb\db\tb.map.bpm
tb\db\tb.map.cdb
tb\db\tb.map.hdb
tb\db\tb.map.kpt
tb\db\tb.map.logdb
tb\db\tb.map.qmsg
tb\db\tb.map.rdb
tb\db\tb.map_bb.cdb
tb\db\tb.map_bb.hdb
tb\db\tb.map_bb.logdb
tb\db\tb.pre_map.hdb
tb\db\tb.pti_db_list.ddb
tb\db\tb.root_partition.map.reg_db.cdb
tb\db\tb.rtlv.hdb
tb\db\tb.rtlv_sg.cdb
tb\db\tb.rtlv_sg_swap.cdb
tb\db\tb.sld_design_entry.sci
tb\db\tb.sld_design_entry_dsc.sci
tb\db\tb.smart_action.txt
tb\db\tb.tis_db_list.ddb
tb\db\tb.tmw_info
tb\db\tb_partition_pins.json
tb\FF_8BITS_256_BLOCK.v
tb\incremental_db\compiled_partitions\tb.db_info
tb\incremental_db\compiled_partitions\tb.root_partition.map.cdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.dpi
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.cdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.hb_info
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.hdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.sig
tb\incremental_db\compiled_partitions\tb.root_partition.map.hdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.kpt
tb\incremental_db\README
tb\output_files\tb.fit.rpt
tb\output_files\tb.fit.summary
tb\output_files\tb.flow.rpt
tb\output_files\tb.map.rpt
tb\output_files\tb.map.summary
tb\pinlv(1).v
tb\pinlv.v
tb\spi_uart.v
tb\spi_uart.v.bak
tb\tb.qpf
tb\tb.qsf
tb\tb.qws
tb\uart_core.v
tb\incremental_db\compiled_partitions
tb\db
tb\incremental_db
tb\output_files
tb
tb\db\a_dpfifo_5h31.tdf
tb\db\cmpr_b78.tdf
tb\db\cntr_537.tdf
tb\db\cntr_o2b.tdf
tb\db\cntr_p2b.tdf
tb\db\prev_cmp_tb.qmsg
tb\db\scfifo_ua31.tdf
tb\db\tb.cbx.xml
tb\db\tb.cmp.bpm
tb\db\tb.cmp.cdb
tb\db\tb.cmp.hdb
tb\db\tb.cmp.logdb
tb\db\tb.cmp.rdb
tb\db\tb.cmp_merge.kpt
tb\db\tb.db_info
tb\db\tb.fit.qmsg
tb\db\tb.hier_info
tb\db\tb.hif
tb\db\tb.lpc.html
tb\db\tb.lpc.rdb
tb\db\tb.lpc.txt
tb\db\tb.map.ammdb
tb\db\tb.map.bpm
tb\db\tb.map.cdb
tb\db\tb.map.hdb
tb\db\tb.map.kpt
tb\db\tb.map.logdb
tb\db\tb.map.qmsg
tb\db\tb.map.rdb
tb\db\tb.map_bb.cdb
tb\db\tb.map_bb.hdb
tb\db\tb.map_bb.logdb
tb\db\tb.pre_map.hdb
tb\db\tb.pti_db_list.ddb
tb\db\tb.root_partition.map.reg_db.cdb
tb\db\tb.rtlv.hdb
tb\db\tb.rtlv_sg.cdb
tb\db\tb.rtlv_sg_swap.cdb
tb\db\tb.sld_design_entry.sci
tb\db\tb.sld_design_entry_dsc.sci
tb\db\tb.smart_action.txt
tb\db\tb.tis_db_list.ddb
tb\db\tb.tmw_info
tb\db\tb_partition_pins.json
tb\FF_8BITS_256_BLOCK.v
tb\incremental_db\compiled_partitions\tb.db_info
tb\incremental_db\compiled_partitions\tb.root_partition.map.cdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.dpi
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.cdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.hb_info
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.hdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.hbdb.sig
tb\incremental_db\compiled_partitions\tb.root_partition.map.hdb
tb\incremental_db\compiled_partitions\tb.root_partition.map.kpt
tb\incremental_db\README
tb\output_files\tb.fit.rpt
tb\output_files\tb.fit.summary
tb\output_files\tb.flow.rpt
tb\output_files\tb.map.rpt
tb\output_files\tb.map.summary
tb\pinlv(1).v
tb\pinlv.v
tb\spi_uart.v
tb\spi_uart.v.bak
tb\tb.qpf
tb\tb.qsf
tb\tb.qws
tb\uart_core.v
tb\incremental_db\compiled_partitions
tb\db
tb\incremental_db
tb\output_files
tb