文件名称:counter_7seg
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带分频器的bcd计数电路设计，verilog源码-dividers with the bcd count circuit design, Verilog source
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压缩包 : 59564327counter_7seg.rar 列表 counter_7seg\bcd_counter.bsf counter_7seg\bcd_counter.v counter_7seg\cmp_state.ini counter_7seg\counter_7seg.asm.rpt counter_7seg\counter_7seg.bdf counter_7seg\counter_7seg.done counter_7seg\counter_7seg.fit.eqn counter_7seg\counter_7seg.fit.rpt counter_7seg\counter_7seg.fit.summary counter_7seg\counter_7seg.flow.rpt counter_7seg\counter_7seg.map.eqn counter_7seg\counter_7seg.map.rpt counter_7seg\counter_7seg.map.summary counter_7seg\counter_7seg.pin counter_7seg\counter_7seg.pof counter_7seg\counter_7seg.qpf counter_7seg\counter_7seg.qsf counter_7seg\counter_7seg.qws counter_7seg\counter_7seg.sim.rpt counter_7seg\counter_7seg.sof counter_7seg\counter_7seg.tan.rpt counter_7seg\counter_7seg.tan.summary counter_7seg\counter_7seg.vwf counter_7seg\counter_7seg1.vwf counter_7seg\counter_7seg2.vwf counter_7seg\counter_7seg3.vwf counter_7seg\db\add_sub_1sh.tdf counter_7seg\db\add_sub_eth.tdf counter_7seg\db\add_sub_kth.tdf counter_7seg\db\counter_7seg.(0).cnf.cdb counter_7seg\db\counter_7seg.(0).cnf.hdb counter_7seg\db\counter_7seg.(1).cnf.cdb counter_7seg\db\counter_7seg.(1).cnf.hdb counter_7seg\db\counter_7seg.(2).cnf.cdb counter_7seg\db\counter_7seg.(2).cnf.hdb counter_7seg\db\counter_7seg.(3).cnf.cdb counter_7seg\db\counter_7seg.(3).cnf.hdb counter_7seg\db\counter_7seg.asm.qmsg counter_7seg\db\counter_7seg.cmp.cdb counter_7seg\db\counter_7seg.cmp.ddb counter_7seg\db\counter_7seg.cmp.hdb counter_7seg\db\counter_7seg.cmp.rdb counter_7seg\db\counter_7seg.cmp.tdb counter_7seg\db\counter_7seg.cmp0.ddb counter_7seg\db\counter_7seg.db_info counter_7seg\db\counter_7seg.eco.cdb counter_7seg\db\counter_7seg.eds_overflow counter_7seg\db\counter_7seg.fit.qmsg counter_7seg\db\counter_7seg.fnsim.hdb counter_7seg\db\counter_7seg.hier_info counter_7seg\db\counter_7seg.hif counter_7seg\db\counter_7seg.icc counter_7seg\db\counter_7seg.map.cdb counter_7seg\db\counter_7seg.map.hdb counter_7seg\db\counter_7seg.map.qmsg counter_7seg\db\counter_7seg.pre_map.cdb counter_7seg\db\counter_7seg.pre_map.hdb counter_7seg\db\counter_7seg.psp counter_7seg\db\counter_7seg.rtlv.hdb counter_7seg\db\counter_7seg.rtlv_sg.cdb counter_7seg\db\counter_7seg.rtlv_sg_swap.cdb counter_7seg\db\counter_7seg.sgdiff.cdb counter_7seg\db\counter_7seg.sgdiff.hdb counter_7seg\db\counter_7seg.signalprobe.cdb counter_7seg\db\counter_7seg.sim.hdb counter_7seg\db\counter_7seg.sim.qmsg counter_7seg\db\counter_7seg.sld_design_entry.sci counter_7seg\db\counter_7seg.sld_design_entry_dsc.sci counter_7seg\db\counter_7seg.syn_hier_info counter_7seg\db\counter_7seg.tan.qmsg counter_7seg\db\counter_7seg_cmp.qrpt counter_7seg\db counter_7seg\decoder_7seg_new.bsf counter_7seg\decoder_7seg_new.v counter_7seg\f50MHz_to_1Hz.bsf counter_7seg\f50MHz_to_1Hz.v counter_7seg