搜索资源列表
HDL CHIP DESIGN
- A practical guide for designing ,synthesizing and simulating ASICs and FPGA using VHDL and verilog hdl
generic_fifos
- Generic, multi-purpose FIFOs. Available as single clock and dual clock version, binary, lfsr, and gray encoded (dual clock only). All are parameterizable and use generic_memories for memory. These FIFOs are fully portabl
udev_brief
- USB 2.0 device core bruef data sheet form www.asics.ws
udev_um
- USB 2.0 device core datasheet form www.asics.ws
usb_latest[1].tar
- sub opercore USB CRC5 and CRC16 Modules //// //// //// //// //// //// Author: Rudolf Usselmann //// //// rudi@asics.ws //// //// //// //// //// //// Downloaded from: http://www.opencores.org/cores/usb/-sub
HDLChipDesign
- a parictical guide for designing, synthesizing and simulating ASICs and FPGAs using VHDL or Veilog
VHDL_Style_Guide
- A style guide for VHDL, the popular hardware descr iptive language for the design/specification of ASICs, FPGAs and CPLDs ICs.-A style guide for VHDL, the popular hardware descr iptive language for the design/specificati
crossroute-R4
- As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstalk has primarily been a concern for
cadence-datasheet
- SynTest-Cadence : One-Pass DFT and Synthesis Solution for ASICs
mod_4
- this code for reliable power aware ASICs which i have done in lab..
HDL_Chip_Design
- HDL Chip Design --- A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog (EBook)
FPGA-FILTERSs
- 采用FPGA，用DSP算法实现数字滤波器，英文资料-Digital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and applic
FPGA-Median-Filter
- Digital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application- specific integrat
generic_fifo_yh
- Generic, multi-purpose FIFOs. Available as single clock and dual clock version, binary, lfsr, and gray encoded (dual clock only). All are parameterizable and use generic_memories for memory. These FIFOs are fully portabl
SDRAM-USING
- Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or applicat
TABLOO
- Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or applicat
XILINX-JTAG-PROGRAMER
- Field programmable gate arrays (FPGAs) are emerging in many areas of high performance computing, either as tailor made signal processor, embedded algorithm implementation, systolic array, software accelerator or applicat
8x16
- ASICS码的对应字库，可以用字单片机、dsp、arm上，很实用，很好用-ASICS corresponding character code, you can use the word microcontroller, dsp, arm, and very practical, very good use
pmac_zilog
- Driver for PowerMac Z85c30 based ESCC cell found in the "macio" ASICs of various PowerMac models.
CL93-V5332-1_P_Building_AMSS_SW
- steps for building AMSS software for various versions of MSM software and target ASICs.